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drm/amd/display: soc_bound_box -update DML based on HW.
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 1 additions and 2 deletions
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@ -68,7 +68,6 @@ double dml_socbb_return_bw_mhz(struct _vcs_dpi_soc_bounding_box_st *box, enum vo
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return_bw = dml_min(
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((double) box->return_bus_width_bytes) * state.dcfclk_mhz,
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state.dram_bw_per_chan_gbps * 1000.0 * (double) box->num_chans
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* box->ideal_dram_bw_after_urgent_percent / 100.0);
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state.dram_bw_per_chan_gbps * 1000.0 * box->ideal_dram_bw_after_urgent_percent / 100.0);
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return return_bw;
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}
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