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PM / devfreq: tegra: Replace write memory barrier with the read barrier

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The write memory barrier isn't needed because the BUS buffer is flushed
by read after write that happens after the removed wmb(), we will also
use readl() instead of the relaxed version to ensure that read is indeed
completed.

Reviewed-by: Chanwoo Choi <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: MyungJoo Ham <[email protected]>
This commit is contained in:
Dmitry Osipenko 2019-05-02 02:38:02 +03:00 • committed by MyungJoo Ham
commit ed2a8dd22a
1 changed files with 1 additions and 2 deletions
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3
drivers/devfreq/tegra-devfreq.c
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@ -231,8 +231,7 @@ static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
static void actmon_write_barrier(struct tegra_devfreq *tegra)
{
/* ensure the update has reached the ACTMON */
wmb();
actmon_readl(tegra, ACTMON_GLB_STATUS);
readl(tegra->regs + ACTMON_GLB_STATUS);
}
static void actmon_isr_device(struct tegra_devfreq *tegra,