clk: gxbb: expose MPLL2 clock for use by DT

This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.

Signed-off-by: Martin Blumenstingl <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
This commit is contained in:
Martin Blumenstingl 2016-09-06 23:38:44 +02:00 • committed by Kevin Hilman
commit ed6f4b5180
2 changed files with 2 additions and 1 deletions

View file

@ -183,7 +183,7 @@
/* CLKID_CLK81 */
#define CLKID_MPLL0 13
#define CLKID_MPLL1 14
#define CLKID_MPLL2 15
/* CLKID_MPLL2 */
#define CLKID_DDR 16
#define CLKID_DOS 17
#define CLKID_ISA 18