mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
[MIPS] TXx9: Make single kernel can support multiple boards
Make single kernel can be used on RBTX4927/37/38. Also make some SoC-specific code independent from board-specific code. Signed-off-by: Atsushi Nemoto <[email protected]> Signed-off-by: Ralf Baechle <[email protected]>
This commit is contained in:
Atsushi Nemoto
Ralf Baechle
parent
766891565b
commit
edcaf1a6a7
29 changed files with 520 additions and 585 deletions
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@ -20,4 +20,22 @@ extern unsigned int txx9_master_clock;
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extern unsigned int txx9_cpu_clock;
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extern unsigned int txx9_gbus_clock;
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struct pci_dev;
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struct txx9_board_vec {
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unsigned long type;
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const char *system;
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void (*prom_init)(void);
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void (*mem_setup)(void);
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void (*irq_setup)(void);
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void (*time_init)(void);
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void (*arch_init)(void);
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void (*device_init)(void);
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#ifdef CONFIG_PCI
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int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
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#endif
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};
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extern struct txx9_board_vec *txx9_board_vec;
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extern int (*txx9_irq_dispatch)(int pending);
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void prom_init_cmdline(void);
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#endif /* __ASM_TXX9_GENERIC_H */
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@ -174,4 +174,9 @@
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* INT[3:0]
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*/
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void jmr3927_prom_init(void);
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void jmr3927_irq_setup(void);
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struct pci_dev;
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int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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#endif /* __ASM_TXX9_JMR3927_H */
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@ -46,12 +46,16 @@
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#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
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#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
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#define RBTX4927_IRQ_IOC (TX4927_IRQ_PIC_BEG + TX4927_NUM_IR)
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#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
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#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
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#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
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#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
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#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
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#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
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#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
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#ifdef CONFIG_PCI
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#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
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#else
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@ -65,8 +69,11 @@
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#define RBTX4927_SW_RESET_ENABLE_SET 0x01
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#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
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#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5)
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#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
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int toshiba_rbtx4927_irq_nested(int sw_irq);
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void rbtx4927_prom_init(void);
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void rbtx4927_irq_setup(void);
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struct pci_dev;
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int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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#endif /* __ASM_TXX9_RBTX4927_H */
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@ -101,35 +101,12 @@
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* that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
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* IRQ hardware is supported.
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*/
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#define RBTX4938_NR_IRQ_LOCAL 8
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#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
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#define RBTX4938_NR_IRQ_IOC 8
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#define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
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#define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
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#define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE
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#define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
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#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
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#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
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#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
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#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1)
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#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7)
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#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0
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#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7
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#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
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#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
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#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG
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#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
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#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
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#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
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#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
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#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
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#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
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#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
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#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
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#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
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#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
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#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
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#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
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@ -157,11 +134,16 @@
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/* IOC (PCI, etc) */
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#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC)
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#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
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/* Onboard 10M Ether */
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#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1)
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#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
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#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
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#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
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void rbtx4938_prom_init(void);
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void rbtx4938_irq_setup(void);
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struct pci_dev;
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int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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#endif /* __ASM_TXX9_RBTX4938_H */
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@ -32,20 +32,6 @@
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#include <asm/txx9irq.h>
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#include <asm/txx9/tx4927pcic.h>
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#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
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#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
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#define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE
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#define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
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#define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0)
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#define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1)
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#define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2)
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#define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7)
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#define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3)
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#define TX4927_SDRAMC_REG 0xff1f8000
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#define TX4927_EBUSC_REG 0xff1f9000
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#define TX4927_PCIC_REG 0xff1fd000
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@ -54,10 +40,14 @@
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#define TX4927_NR_TMR 3
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#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
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#define TX4927_IR_INT(n) (2 + (n))
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#define TX4927_IR_SIO(n) (8 + (n))
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#define TX4927_IR_PCIC 16
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#define TX4927_IR_PCIERR 22
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#define TX4927_NUM_IR 32
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#define TX4927_IRC_INT 2 /* IP[2] in Status register */
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struct tx4927_sdramc_reg {
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volatile unsigned long long cr[4];
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volatile unsigned long long unused0[4];
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@ -224,5 +214,6 @@ static inline void tx4927_ccfg_change(__u64 change, __u64 new)
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int tx4927_report_pciclk(void);
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int tx4927_pciclk66_setup(void);
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void tx4927_irq_init(void);
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#endif /* __ASM_TXX9_TX4927_H */
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@ -18,11 +18,6 @@
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#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
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#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
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#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
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#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
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#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
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#define TX4938_PCIIO_0 0x10000000
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#define TX4938_PCIIO_1 0x01010000
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#define TX4938_PCIMEM_0 0x08000000
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@ -271,6 +266,8 @@ struct tx4938_ccfg_reg {
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#define TX4938_IR_ETH0 TX4938_IR_INT(4)
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#define TX4938_IR_ETH1 TX4938_IR_INT(3)
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#define TX4938_IRC_INT 2 /* IP[2] in Status register */
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/*
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* CCFG
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*/
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@ -463,5 +460,6 @@ void tx4938_report_pci1clk(void);
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int tx4938_pciclk66_setup(void);
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struct pci_dev;
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int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
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void tx4938_irq_init(void);
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#endif
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