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clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU

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Clocks related to DISP1 block require special handling for power domain
turn on/off sequences. Till now this was handled by Exynos power domain
driver, but that approach was limited only to some special cases. This
patch moves handling of those operations to clock controller driver.
This gives more flexibility and allows fine tune values of some
clock-specific registers. This patch moves handling of those mentioned
clocks to Exynos5 sub-CMU driver instantiated from Exynos5250 driver.

Signed-off-by: Marek Szyprowski <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Sylwester Nawrocki <[email protected]>
This commit is contained in:
Marek Szyprowski 2018-03-06 15:33:10 +01:00 • committed by Sylwester Nawrocki
commit edcefb96fb
4 changed files with 38 additions and 16 deletions
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1
drivers/soc/samsung/pm_domains.c
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@ -148,6 +148,7 @@ static __init const char *exynos_get_domain_name(struct device_node *node)
}
static const char *soc_force_no_clk[] = {
"samsung,exynos5250-clock",
"samsung,exynos5420-clock",
"samsung,exynos5800-clock",
};