mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
Merge 5.4.272 into android11-5.4-lts
Changes in 5.4.272
lan78xx: Fix white space and style issues
lan78xx: Add missing return code checks
lan78xx: Fix partial packet errors on suspend/resume
lan78xx: Fix race conditions in suspend/resume handling
net: lan78xx: fix runtime PM count underflow on link stop
ixgbe: {dis, en}able irqs in ixgbe_txrx_ring_{dis, en}able
geneve: make sure to pull inner header in geneve_rx()
net: ice: Fix potential NULL pointer dereference in ice_bridge_setlink()
net/ipv6: avoid possible UAF in ip6_route_mpath_notify()
net/rds: fix WARNING in rds_conn_connect_if_down
netfilter: nft_ct: fix l3num expectations with inet pseudo family
netfilter: nf_conntrack_h323: Add protection for bmp length out of range
netrom: Fix a data-race around sysctl_netrom_default_path_quality
netrom: Fix a data-race around sysctl_netrom_obsolescence_count_initialiser
netrom: Fix data-races around sysctl_netrom_network_ttl_initialiser
netrom: Fix a data-race around sysctl_netrom_transport_timeout
netrom: Fix a data-race around sysctl_netrom_transport_maximum_tries
netrom: Fix a data-race around sysctl_netrom_transport_acknowledge_delay
netrom: Fix a data-race around sysctl_netrom_transport_busy_delay
netrom: Fix a data-race around sysctl_netrom_transport_requested_window_size
netrom: Fix a data-race around sysctl_netrom_transport_no_activity_timeout
netrom: Fix a data-race around sysctl_netrom_routing_control
netrom: Fix a data-race around sysctl_netrom_link_fails_count
netrom: Fix data-races around sysctl_net_busy_read
selftests: mm: fix map_hugetlb failure on 64K page size systems
um: allow not setting extra rpaths in the linux binary
serial: max310x: Use devm_clk_get_optional() to get the input clock
serial: max310x: Try to get crystal clock rate from property
serial: max310x: fail probe if clock crystal is unstable
serial: max310x: Make use of device properties
serial: max310x: use regmap methods for SPI batch operations
serial: max310x: use a separate regmap for each port
serial: max310x: prevent infinite while() loop in port startup
Input: i8042 - fix strange behavior of touchpad on Clevo NS70PU
hv_netvsc: Make netvsc/VF binding check both MAC and serial number
hv_netvsc: use netif_is_bond_master() instead of open code
hv_netvsc: Register VF in netvsc_probe if NET_DEVICE_REGISTER missed
y2038: rusage: use __kernel_old_timeval
getrusage: add the "signal_struct *sig" local variable
getrusage: move thread_group_cputime_adjusted() outside of lock_task_sighand()
getrusage: use __for_each_thread()
getrusage: use sig->stats_lock rather than lock_task_sighand()
serial: max310x: Unprepare and disable clock in error path
regmap: allow to define reg_update_bits for no bus configuration
regmap: Add bulk read/write callbacks into regmap_config
serial: max310x: make accessing revision id interface-agnostic
serial: max310x: implement I2C support
serial: max310x: fix IO data corruption in batched operations
arm64: dts: qcom: add PDC interrupt controller for SDM845
arm64: dts: qcom: sdm845: fix USB DP/DM HS PHY interrupts
Linux 5.4.272
Change-Id: Ia3f453dd3f080776d3fdd46b1ea58c6554a70fd6
Signed-off-by: Greg Kroah-Hartman <[email protected]>
This commit is contained in:
Greg Kroah-Hartman
commit
ee2f1c68f1
30 changed files with 1317 additions and 456 deletions
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@ -344,6 +344,7 @@ config SERIAL_MAX310X
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depends on SPI_MASTER
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select SERIAL_CORE
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select REGMAP_SPI if SPI_MASTER
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select REGMAP_I2C if I2C
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help
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This selects support for an advanced UART from Maxim (Dallas).
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Supported ICs are MAX3107, MAX3108, MAX3109, MAX14830.
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@ -14,9 +14,10 @@
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/gpio/driver.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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@ -72,7 +73,8 @@
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#define MAX310X_GLOBALCMD_REG MAX310X_REG_1F /* Global Command (WO) */
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/* Extended registers */
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#define MAX310X_REVID_EXTREG MAX310X_REG_05 /* Revision ID */
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#define MAX310X_SPI_REVID_EXTREG MAX310X_REG_05 /* Revision ID */
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#define MAX310X_I2C_REVID_EXTREG (0x25) /* Revision ID */
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/* IRQ register bits */
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#define MAX310X_IRQ_LSR_BIT (1 << 0) /* LSR interrupt */
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@ -235,6 +237,10 @@
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#define MAX310x_REV_MASK (0xf8)
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#define MAX310X_WRITE_BIT 0x80
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/* Port startup definitions */
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#define MAX310X_PORT_STARTUP_WAIT_RETRIES 20 /* Number of retries */
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#define MAX310X_PORT_STARTUP_WAIT_DELAY_MS 10 /* Delay between retries */
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/* Crystal-related definitions */
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#define MAX310X_XTAL_WAIT_RETRIES 20 /* Number of retries */
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#define MAX310X_XTAL_WAIT_DELAY_MS 10 /* Delay between retries */
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@ -249,7 +255,17 @@
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#define MAX14830_BRGCFG_CLKDIS_BIT (1 << 6) /* Clock Disable */
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#define MAX14830_REV_ID (0xb0)
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struct max310x_if_cfg {
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int (*extended_reg_enable)(struct device *dev, bool enable);
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unsigned int rev_id_reg;
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};
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struct max310x_devtype {
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struct {
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unsigned short min;
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unsigned short max;
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} slave_addr;
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char name[9];
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int nr;
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u8 mode1;
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@ -262,16 +278,16 @@ struct max310x_one {
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struct work_struct tx_work;
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struct work_struct md_work;
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struct work_struct rs_work;
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struct regmap *regmap;
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u8 wr_header;
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u8 rd_header;
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u8 rx_buf[MAX310X_FIFO_SIZE];
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};
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#define to_max310x_port(_port) \
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container_of(_port, struct max310x_one, port)
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struct max310x_port {
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struct max310x_devtype *devtype;
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const struct max310x_devtype *devtype;
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const struct max310x_if_cfg *if_cfg;
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struct regmap *regmap;
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struct clk *clk;
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#ifdef CONFIG_GPIOLIB
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@ -293,26 +309,26 @@ static DECLARE_BITMAP(max310x_lines, MAX310X_UART_NRMAX);
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static u8 max310x_port_read(struct uart_port *port, u8 reg)
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{
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struct max310x_port *s = dev_get_drvdata(port->dev);
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struct max310x_one *one = to_max310x_port(port);
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unsigned int val = 0;
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regmap_read(s->regmap, port->iobase + reg, &val);
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regmap_read(one->regmap, reg, &val);
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return val;
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}
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static void max310x_port_write(struct uart_port *port, u8 reg, u8 val)
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{
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struct max310x_port *s = dev_get_drvdata(port->dev);
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struct max310x_one *one = to_max310x_port(port);
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regmap_write(s->regmap, port->iobase + reg, val);
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regmap_write(one->regmap, reg, val);
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}
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static void max310x_port_update(struct uart_port *port, u8 reg, u8 mask, u8 val)
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{
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struct max310x_port *s = dev_get_drvdata(port->dev);
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struct max310x_one *one = to_max310x_port(port);
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regmap_update_bits(s->regmap, port->iobase + reg, mask, val);
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regmap_update_bits(one->regmap, reg, mask, val);
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}
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static int max3107_detect(struct device *dev)
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@ -361,13 +377,12 @@ static int max3109_detect(struct device *dev)
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unsigned int val = 0;
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int ret;
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ret = regmap_write(s->regmap, MAX310X_GLOBALCMD_REG,
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MAX310X_EXTREG_ENBL);
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ret = s->if_cfg->extended_reg_enable(dev, true);
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if (ret)
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return ret;
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regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val);
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regmap_write(s->regmap, MAX310X_GLOBALCMD_REG, MAX310X_EXTREG_DSBL);
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regmap_read(s->regmap, s->if_cfg->rev_id_reg, &val);
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s->if_cfg->extended_reg_enable(dev, false);
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if (((val & MAX310x_REV_MASK) != MAX3109_REV_ID)) {
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dev_err(dev,
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"%s ID 0x%02x does not match\n", s->devtype->name, val);
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@ -392,13 +407,12 @@ static int max14830_detect(struct device *dev)
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unsigned int val = 0;
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int ret;
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ret = regmap_write(s->regmap, MAX310X_GLOBALCMD_REG,
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MAX310X_EXTREG_ENBL);
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ret = s->if_cfg->extended_reg_enable(dev, true);
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if (ret)
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return ret;
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regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val);
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regmap_write(s->regmap, MAX310X_GLOBALCMD_REG, MAX310X_EXTREG_DSBL);
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regmap_read(s->regmap, s->if_cfg->rev_id_reg, &val);
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s->if_cfg->extended_reg_enable(dev, false);
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if (((val & MAX310x_REV_MASK) != MAX14830_REV_ID)) {
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dev_err(dev,
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"%s ID 0x%02x does not match\n", s->devtype->name, val);
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@ -423,6 +437,10 @@ static const struct max310x_devtype max3107_devtype = {
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.mode1 = MAX310X_MODE1_AUTOSLEEP_BIT | MAX310X_MODE1_IRQSEL_BIT,
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.detect = max3107_detect,
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.power = max310x_power,
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.slave_addr = {
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.min = 0x2c,
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.max = 0x2f,
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},
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};
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static const struct max310x_devtype max3108_devtype = {
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@ -431,6 +449,10 @@ static const struct max310x_devtype max3108_devtype = {
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.mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
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.detect = max3108_detect,
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.power = max310x_power,
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.slave_addr = {
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.min = 0x60,
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.max = 0x6f,
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},
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};
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static const struct max310x_devtype max3109_devtype = {
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@ -439,6 +461,10 @@ static const struct max310x_devtype max3109_devtype = {
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.mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
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.detect = max3109_detect,
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.power = max310x_power,
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.slave_addr = {
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.min = 0x60,
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.max = 0x6f,
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},
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};
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static const struct max310x_devtype max14830_devtype = {
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@ -447,11 +473,15 @@ static const struct max310x_devtype max14830_devtype = {
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.mode1 = MAX310X_MODE1_IRQSEL_BIT,
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.detect = max14830_detect,
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.power = max14830_power,
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.slave_addr = {
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.min = 0x60,
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.max = 0x6f,
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},
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};
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static bool max310x_reg_writeable(struct device *dev, unsigned int reg)
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{
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switch (reg & 0x1f) {
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switch (reg) {
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case MAX310X_IRQSTS_REG:
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case MAX310X_LSR_IRQSTS_REG:
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case MAX310X_SPCHR_IRQSTS_REG:
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@ -468,7 +498,7 @@ static bool max310x_reg_writeable(struct device *dev, unsigned int reg)
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static bool max310x_reg_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg & 0x1f) {
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switch (reg) {
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case MAX310X_RHR_REG:
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case MAX310X_IRQSTS_REG:
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case MAX310X_LSR_IRQSTS_REG:
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@ -490,7 +520,7 @@ static bool max310x_reg_volatile(struct device *dev, unsigned int reg)
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static bool max310x_reg_precious(struct device *dev, unsigned int reg)
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{
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switch (reg & 0x1f) {
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switch (reg) {
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case MAX310X_RHR_REG:
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case MAX310X_IRQSTS_REG:
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case MAX310X_SPCHR_IRQSTS_REG:
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@ -503,6 +533,11 @@ static bool max310x_reg_precious(struct device *dev, unsigned int reg)
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return false;
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}
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static bool max310x_reg_noinc(struct device *dev, unsigned int reg)
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{
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return reg == MAX310X_RHR_REG;
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}
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static int max310x_set_baud(struct uart_port *port, int baud)
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{
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unsigned int mode = 0, div = 0, frac = 0, c = 0, F = 0;
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@ -556,7 +591,7 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
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return 1;
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}
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static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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unsigned long freq, bool xtal)
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{
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unsigned int div, clksrc, pllcfg = 0;
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@ -626,40 +661,25 @@ static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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} while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES));
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if (!stable)
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dev_warn(dev, "clock is not stable yet\n");
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return dev_err_probe(dev, -EAGAIN,
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"clock is not stable\n");
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}
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return (int)bestfreq;
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return bestfreq;
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}
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static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
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{
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struct max310x_one *one = to_max310x_port(port);
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struct spi_transfer xfer[] = {
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{
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.tx_buf = &one->wr_header,
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.len = sizeof(one->wr_header),
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}, {
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.tx_buf = txbuf,
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.len = len,
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}
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};
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spi_sync_transfer(to_spi_device(port->dev), xfer, ARRAY_SIZE(xfer));
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regmap_noinc_write(one->regmap, MAX310X_THR_REG, txbuf, len);
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}
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static void max310x_batch_read(struct uart_port *port, u8 *rxbuf, unsigned int len)
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{
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struct max310x_one *one = to_max310x_port(port);
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struct spi_transfer xfer[] = {
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{
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.tx_buf = &one->rd_header,
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.len = sizeof(one->rd_header),
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}, {
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.rx_buf = rxbuf,
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.len = len,
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}
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};
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spi_sync_transfer(to_spi_device(port->dev), xfer, ARRAY_SIZE(xfer));
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regmap_noinc_read(one->regmap, MAX310X_RHR_REG, rxbuf, len);
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}
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static void max310x_handle_rx(struct uart_port *port, unsigned int rxlen)
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@ -1261,16 +1281,18 @@ static int max310x_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
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}
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#endif
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static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
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struct regmap *regmap, int irq)
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static int max310x_probe(struct device *dev, const struct max310x_devtype *devtype,
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const struct max310x_if_cfg *if_cfg,
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struct regmap *regmaps[], int irq)
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{
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int i, ret, fmin, fmax, freq, uartclk;
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struct clk *clk_osc, *clk_xtal;
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int i, ret, fmin, fmax, freq;
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struct max310x_port *s;
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bool xtal = false;
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s32 uartclk = 0;
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bool xtal;
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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for (i = 0; i < devtype->nr; i++)
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if (IS_ERR(regmaps[i]))
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return PTR_ERR(regmaps[i]);
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/* Alloc port structure */
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s = devm_kzalloc(dev, struct_size(s, p, devtype->nr), GFP_KERNEL);
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@ -1279,23 +1301,20 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
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return -ENOMEM;
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}
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clk_osc = devm_clk_get(dev, "osc");
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clk_xtal = devm_clk_get(dev, "xtal");
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if (!IS_ERR(clk_osc)) {
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s->clk = clk_osc;
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fmin = 500000;
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fmax = 35000000;
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} else if (!IS_ERR(clk_xtal)) {
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s->clk = clk_xtal;
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fmin = 1000000;
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fmax = 4000000;
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xtal = true;
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} else if (PTR_ERR(clk_osc) == -EPROBE_DEFER ||
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PTR_ERR(clk_xtal) == -EPROBE_DEFER) {
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return -EPROBE_DEFER;
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/* Always ask for fixed clock rate from a property. */
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device_property_read_u32(dev, "clock-frequency", &uartclk);
|
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|
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s->clk = devm_clk_get_optional(dev, "osc");
|
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if (IS_ERR(s->clk))
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return PTR_ERR(s->clk);
|
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if (s->clk) {
|
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xtal = false;
|
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} else {
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dev_err(dev, "Cannot get clock\n");
|
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return -EINVAL;
|
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s->clk = devm_clk_get_optional(dev, "xtal");
|
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if (IS_ERR(s->clk))
|
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return PTR_ERR(s->clk);
|
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|
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xtal = true;
|
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}
|
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|
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ret = clk_prepare_enable(s->clk);
|
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|
|
@ -1303,14 +1322,31 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
|
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return ret;
|
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|
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freq = clk_get_rate(s->clk);
|
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if (freq == 0)
|
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freq = uartclk;
|
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if (freq == 0) {
|
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dev_err(dev, "Cannot get clock rate\n");
|
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ret = -EINVAL;
|
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goto out_clk;
|
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}
|
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|
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if (xtal) {
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fmin = 1000000;
|
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fmax = 4000000;
|
||||
} else {
|
||||
fmin = 500000;
|
||||
fmax = 35000000;
|
||||
}
|
||||
|
||||
/* Check frequency limits */
|
||||
if (freq < fmin || freq > fmax) {
|
||||
ret = -ERANGE;
|
||||
goto out_clk;
|
||||
}
|
||||
|
||||
s->regmap = regmap;
|
||||
s->regmap = regmaps[0];
|
||||
s->devtype = devtype;
|
||||
s->if_cfg = if_cfg;
|
||||
dev_set_drvdata(dev, s);
|
||||
|
||||
/* Check device to ensure we are talking to what we expect */
|
||||
|
|
@ -1319,25 +1355,38 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
|
|||
goto out_clk;
|
||||
|
||||
for (i = 0; i < devtype->nr; i++) {
|
||||
unsigned int offs = i << 5;
|
||||
bool started = false;
|
||||
unsigned int try = 0, val = 0;
|
||||
|
||||
/* Reset port */
|
||||
regmap_write(s->regmap, MAX310X_MODE2_REG + offs,
|
||||
regmap_write(regmaps[i], MAX310X_MODE2_REG,
|
||||
MAX310X_MODE2_RST_BIT);
|
||||
/* Clear port reset */
|
||||
regmap_write(s->regmap, MAX310X_MODE2_REG + offs, 0);
|
||||
regmap_write(regmaps[i], MAX310X_MODE2_REG, 0);
|
||||
|
||||
/* Wait for port startup */
|
||||
do {
|
||||
regmap_read(s->regmap,
|
||||
MAX310X_BRGDIVLSB_REG + offs, &ret);
|
||||
} while (ret != 0x01);
|
||||
msleep(MAX310X_PORT_STARTUP_WAIT_DELAY_MS);
|
||||
regmap_read(regmaps[i], MAX310X_BRGDIVLSB_REG, &val);
|
||||
|
||||
regmap_write(s->regmap, MAX310X_MODE1_REG + offs,
|
||||
devtype->mode1);
|
||||
if (val == 0x01)
|
||||
started = true;
|
||||
} while (!started && (++try < MAX310X_PORT_STARTUP_WAIT_RETRIES));
|
||||
|
||||
if (!started) {
|
||||
ret = dev_err_probe(dev, -EAGAIN, "port reset failed\n");
|
||||
goto out_uart;
|
||||
}
|
||||
|
||||
regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);
|
||||
}
|
||||
|
||||
uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
|
||||
if (uartclk < 0) {
|
||||
ret = uartclk;
|
||||
goto out_uart;
|
||||
}
|
||||
|
||||
dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
|
||||
|
||||
for (i = 0; i < devtype->nr; i++) {
|
||||
|
|
@ -1357,11 +1406,13 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
|
|||
s->p[i].port.fifosize = MAX310X_FIFO_SIZE;
|
||||
s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
|
||||
s->p[i].port.iotype = UPIO_PORT;
|
||||
s->p[i].port.iobase = i * 0x20;
|
||||
s->p[i].port.iobase = i;
|
||||
s->p[i].port.membase = (void __iomem *)~0;
|
||||
s->p[i].port.uartclk = uartclk;
|
||||
s->p[i].port.rs485_config = max310x_rs485_config;
|
||||
s->p[i].port.ops = &max310x_ops;
|
||||
s->p[i].regmap = regmaps[i];
|
||||
|
||||
/* Disable all interrupts */
|
||||
max310x_port_write(&s->p[i].port, MAX310X_IRQEN_REG, 0);
|
||||
/* Clear IRQ status register */
|
||||
|
|
@ -1372,10 +1423,6 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
|
|||
INIT_WORK(&s->p[i].md_work, max310x_md_proc);
|
||||
/* Initialize queue for changing RS485 mode */
|
||||
INIT_WORK(&s->p[i].rs_work, max310x_rs_proc);
|
||||
/* Initialize SPI-transfer buffers */
|
||||
s->p[i].wr_header = (s->p[i].port.iobase + MAX310X_THR_REG) |
|
||||
MAX310X_WRITE_BIT;
|
||||
s->p[i].rd_header = (s->p[i].port.iobase + MAX310X_RHR_REG);
|
||||
|
||||
/* Register port */
|
||||
ret = uart_add_one_port(&max310x_uart, &s->p[i].port);
|
||||
|
|
@ -1462,16 +1509,35 @@ static struct regmap_config regcfg = {
|
|||
.val_bits = 8,
|
||||
.write_flag_mask = MAX310X_WRITE_BIT,
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
.max_register = MAX310X_REG_1F,
|
||||
.writeable_reg = max310x_reg_writeable,
|
||||
.volatile_reg = max310x_reg_volatile,
|
||||
.precious_reg = max310x_reg_precious,
|
||||
.writeable_noinc_reg = max310x_reg_noinc,
|
||||
.readable_noinc_reg = max310x_reg_noinc,
|
||||
.max_raw_read = MAX310X_FIFO_SIZE,
|
||||
.max_raw_write = MAX310X_FIFO_SIZE,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_SPI_MASTER
|
||||
static int max310x_spi_extended_reg_enable(struct device *dev, bool enable)
|
||||
{
|
||||
struct max310x_port *s = dev_get_drvdata(dev);
|
||||
|
||||
return regmap_write(s->regmap, MAX310X_GLOBALCMD_REG,
|
||||
enable ? MAX310X_EXTREG_ENBL : MAX310X_EXTREG_DSBL);
|
||||
}
|
||||
|
||||
static const struct max310x_if_cfg __maybe_unused max310x_spi_if_cfg = {
|
||||
.extended_reg_enable = max310x_spi_extended_reg_enable,
|
||||
.rev_id_reg = MAX310X_SPI_REVID_EXTREG,
|
||||
};
|
||||
|
||||
static int max310x_spi_probe(struct spi_device *spi)
|
||||
{
|
||||
struct max310x_devtype *devtype;
|
||||
struct regmap *regmap;
|
||||
const struct max310x_devtype *devtype;
|
||||
struct regmap *regmaps[4];
|
||||
unsigned int i;
|
||||
int ret;
|
||||
|
||||
/* Setup SPI bus */
|
||||
|
|
@ -1482,23 +1548,18 @@ static int max310x_spi_probe(struct spi_device *spi)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (spi->dev.of_node) {
|
||||
const struct of_device_id *of_id =
|
||||
of_match_device(max310x_dt_ids, &spi->dev);
|
||||
if (!of_id)
|
||||
return -ENODEV;
|
||||
devtype = device_get_match_data(&spi->dev);
|
||||
if (!devtype)
|
||||
devtype = (struct max310x_devtype *)spi_get_device_id(spi)->driver_data;
|
||||
|
||||
devtype = (struct max310x_devtype *)of_id->data;
|
||||
} else {
|
||||
const struct spi_device_id *id_entry = spi_get_device_id(spi);
|
||||
|
||||
devtype = (struct max310x_devtype *)id_entry->driver_data;
|
||||
for (i = 0; i < devtype->nr; i++) {
|
||||
u8 port_mask = i * 0x20;
|
||||
regcfg.read_flag_mask = port_mask;
|
||||
regcfg.write_flag_mask = port_mask | MAX310X_WRITE_BIT;
|
||||
regmaps[i] = devm_regmap_init_spi(spi, ®cfg);
|
||||
}
|
||||
|
||||
regcfg.max_register = devtype->nr * 0x20 - 1;
|
||||
regmap = devm_regmap_init_spi(spi, ®cfg);
|
||||
|
||||
return max310x_probe(&spi->dev, devtype, regmap, spi->irq);
|
||||
return max310x_probe(&spi->dev, devtype, &max310x_spi_if_cfg, regmaps, spi->irq);
|
||||
}
|
||||
|
||||
static int max310x_spi_remove(struct spi_device *spi)
|
||||
|
|
@ -1518,7 +1579,7 @@ MODULE_DEVICE_TABLE(spi, max310x_id_table);
|
|||
static struct spi_driver max310x_spi_driver = {
|
||||
.driver = {
|
||||
.name = MAX310X_NAME,
|
||||
.of_match_table = of_match_ptr(max310x_dt_ids),
|
||||
.of_match_table = max310x_dt_ids,
|
||||
.pm = &max310x_pm_ops,
|
||||
},
|
||||
.probe = max310x_spi_probe,
|
||||
|
|
@ -1527,6 +1588,101 @@ static struct spi_driver max310x_spi_driver = {
|
|||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C
|
||||
static int max310x_i2c_extended_reg_enable(struct device *dev, bool enable)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct regmap_config regcfg_i2c = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
.writeable_reg = max310x_reg_writeable,
|
||||
.volatile_reg = max310x_reg_volatile,
|
||||
.precious_reg = max310x_reg_precious,
|
||||
.max_register = MAX310X_I2C_REVID_EXTREG,
|
||||
.writeable_noinc_reg = max310x_reg_noinc,
|
||||
.readable_noinc_reg = max310x_reg_noinc,
|
||||
.max_raw_read = MAX310X_FIFO_SIZE,
|
||||
.max_raw_write = MAX310X_FIFO_SIZE,
|
||||
};
|
||||
|
||||
static const struct max310x_if_cfg max310x_i2c_if_cfg = {
|
||||
.extended_reg_enable = max310x_i2c_extended_reg_enable,
|
||||
.rev_id_reg = MAX310X_I2C_REVID_EXTREG,
|
||||
};
|
||||
|
||||
static unsigned short max310x_i2c_slave_addr(unsigned short addr,
|
||||
unsigned int nr)
|
||||
{
|
||||
/*
|
||||
* For MAX14830 and MAX3109, the slave address depends on what the
|
||||
* A0 and A1 pins are tied to.
|
||||
* See Table I2C Address Map of the datasheet.
|
||||
* Based on that table, the following formulas were determined.
|
||||
* UART1 - UART0 = 0x10
|
||||
* UART2 - UART1 = 0x20 + 0x10
|
||||
* UART3 - UART2 = 0x10
|
||||
*/
|
||||
|
||||
addr -= nr * 0x10;
|
||||
|
||||
if (nr >= 2)
|
||||
addr -= 0x20;
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
static int max310x_i2c_probe(struct i2c_client *client)
|
||||
{
|
||||
const struct max310x_devtype *devtype =
|
||||
device_get_match_data(&client->dev);
|
||||
struct i2c_client *port_client;
|
||||
struct regmap *regmaps[4];
|
||||
unsigned int i;
|
||||
u8 port_addr;
|
||||
|
||||
if (client->addr < devtype->slave_addr.min ||
|
||||
client->addr > devtype->slave_addr.max)
|
||||
return dev_err_probe(&client->dev, -EINVAL,
|
||||
"Slave addr 0x%x outside of range [0x%x, 0x%x]\n",
|
||||
client->addr, devtype->slave_addr.min,
|
||||
devtype->slave_addr.max);
|
||||
|
||||
regmaps[0] = devm_regmap_init_i2c(client, ®cfg_i2c);
|
||||
|
||||
for (i = 1; i < devtype->nr; i++) {
|
||||
port_addr = max310x_i2c_slave_addr(client->addr, i);
|
||||
port_client = devm_i2c_new_dummy_device(&client->dev,
|
||||
client->adapter,
|
||||
port_addr);
|
||||
|
||||
regmaps[i] = devm_regmap_init_i2c(port_client, ®cfg_i2c);
|
||||
}
|
||||
|
||||
return max310x_probe(&client->dev, devtype, &max310x_i2c_if_cfg,
|
||||
regmaps, client->irq);
|
||||
}
|
||||
|
||||
static int max310x_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
max310x_remove(&client->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct i2c_driver max310x_i2c_driver = {
|
||||
.driver = {
|
||||
.name = MAX310X_NAME,
|
||||
.of_match_table = max310x_dt_ids,
|
||||
.pm = &max310x_pm_ops,
|
||||
},
|
||||
.probe_new = max310x_i2c_probe,
|
||||
.remove = max310x_i2c_remove,
|
||||
};
|
||||
#endif
|
||||
|
||||
static int __init max310x_uart_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
|
@ -1540,15 +1696,35 @@ static int __init max310x_uart_init(void)
|
|||
#ifdef CONFIG_SPI_MASTER
|
||||
ret = spi_register_driver(&max310x_spi_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&max310x_uart);
|
||||
goto err_spi_register;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C
|
||||
ret = i2c_add_driver(&max310x_i2c_driver);
|
||||
if (ret)
|
||||
goto err_i2c_register;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_I2C
|
||||
err_i2c_register:
|
||||
spi_unregister_driver(&max310x_spi_driver);
|
||||
#endif
|
||||
|
||||
err_spi_register:
|
||||
uart_unregister_driver(&max310x_uart);
|
||||
|
||||
return ret;
|
||||
}
|
||||
module_init(max310x_uart_init);
|
||||
|
||||
static void __exit max310x_uart_exit(void)
|
||||
{
|
||||
#ifdef CONFIG_I2C
|
||||
i2c_del_driver(&max310x_i2c_driver);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPI_MASTER
|
||||
spi_unregister_driver(&max310x_spi_driver);
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue