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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: dts: msm: Add support for glink for SDMSHRIKE
Add glink and its dependent device tree node to support SDMSHRIKE for automotive platforms. Change-Id: Ib259938079713c19521edf00eb7c612c61ced57b
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84
qcom/sa8195-smp2p.dtsi
Normal file
84
qcom/sa8195-smp2p.dtsi
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@ -0,0 +1,84 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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&soc {
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qcom,smp2p-modem {
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compatible = "qcom,smp2p";
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qcom,smem = <435>, <428>;
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interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 0 14>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <1>;
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modem_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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modem_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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qcom,smp2p-adsp {
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compatible = "qcom,smp2p";
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qcom,smem = <443>, <429>;
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interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 0 10>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <2>;
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adsp_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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adsp_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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qcom,smp2p-dsps {
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compatible = "qcom,smp2p";
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qcom,smem = <481>, <430>;
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interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 0 26>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <3>;
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dsps_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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dsps_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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qcom,smp2p-cdsp {
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compatible = "qcom,smp2p";
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qcom,smem = <94>, <432>;
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interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 0 6>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <5>;
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cdsp_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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cdsp_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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};
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@ -763,6 +763,298 @@
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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qmp_aop: qcom,qmp-aop@c300000 {
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compatible = "qcom,qmp-mbox";
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reg = <0xc300000 0x1000>, <0x17c0000C 0x4>;
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reg-names = "msgram", "irq-reg-base";
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qcom,irq-mask = <0x1>;
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interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
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label = "aop";
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qcom,early-boot;
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priority = <0>;
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mbox-desc-offset = <0x0>;
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#mbox-cells = <1>;
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};
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tcsr_mutex_block: syscon@1f40000 {
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compatible = "syscon";
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reg = <0x1f40000 0x20000>;
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};
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tcsr_mutex: hwlock@1f40000 {
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compatible = "qcom,tcsr-mutex";
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syscon = <&tcsr_mutex_block 0 0x1000>;
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#hwlock-cells = <1>;
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};
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smem: qcom,smem@8600000 {
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compatible = "qcom,smem";
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memory-region = <&smem_region>;
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hwlocks = <&tcsr_mutex 3>;
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};
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apcs: syscon@17c0000c {
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compatible = "syscon";
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reg = <0x17c0000c 0x4>;
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};
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apss_shared: mailbox@17c00000 {
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compatible = "qcom,sm8150-apss-shared";
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reg = <0x17c00000 0x1000>;
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#mbox-cells = <1>;
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};
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sp_scsr: mailbox@188501c {
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compatible = "qcom,sm8150-spcs-global";
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reg = <0x188501c 0x4>;
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#mbox-cells = <1>;
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};
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sp_scsr_block: syscon@1880000 {
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compatible = "syscon";
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reg = <0x1880000 0x10000>;
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};
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intsp: qcom,qsee_irq {
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compatible = "qcom,sm8150-qsee-irq";
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syscon = <&sp_scsr_block>;
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interrupts = <0 348 IRQ_TYPE_LEVEL_HIGH>,
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<0 349 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "sp_ipc0",
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"sp_ipc1";
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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qcom,qsee_irq_bridge {
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compatible = "qcom,qsee-ipc-irq-bridge";
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qcom,qsee-ipc-irq-spss {
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qcom,dev-name = "qsee_ipc_irq_spss";
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label = "spss";
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interrupt-parent = <&intsp>;
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interrupts = <1 0 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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qcom,glink {
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compatible = "qcom,glink";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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glink_modem: modem {
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qcom,remote-pid = <1>;
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transport = "smem";
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mboxes = <&apss_shared 12>;
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mbox-names = "mpss_smem";
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interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
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label = "modem";
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qcom,glink-label = "mpss";
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qcom,modem_qrtr {
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qcom,glink-channels = "IPCRTR";
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qcom,low-latency;
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qcom,intents = <0x800 5
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0x2000 3
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0x4400 2>;
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};
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qcom,msm_fastrpc_rpmsg {
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compatible = "qcom,msm-fastrpc-rpmsg";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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};
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qcom,modem_glink_ssr {
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qcom,glink-channels = "glink_ssr";
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qcom,notify-edges = <&glink_adsp>,
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<&glink_slpi>,
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<&glink_cdsp>,
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<&glink_spss>;
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};
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};
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glink_adsp: adsp {
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qcom,remote-pid = <2>;
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transport = "smem";
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mboxes = <&apss_shared 8>;
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mbox-names = "adsp_smem";
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interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
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label = "adsp";
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qcom,glink-label = "lpass";
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cpu-affinity = <1 2>;
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qcom,adsp_qrtr {
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qcom,glink-channels = "IPCRTR";
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qcom,intents = <0x800 5
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0x2000 3
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0x4400 2>;
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};
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qcom,apr_tal_rpmsg {
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qcom,glink-channels = "apr_audio_svc";
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qcom,intents = <0x200 20>;
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};
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qcom,msm_fastrpc_rpmsg {
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compatible = "qcom,msm-fastrpc-rpmsg";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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};
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qcom,adsp_glink_ssr {
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qcom,glink-channels = "glink_ssr";
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qcom,notify-edges = <&glink_modem>,
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<&glink_slpi>,
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<&glink_cdsp>;
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};
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};
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glink_slpi: dsps {
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qcom,remote-pid = <3>;
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transport = "smem";
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mboxes = <&apss_shared 24>;
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mbox-names = "dsps_smem";
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interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
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label = "slpi";
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qcom,glink-label = "dsps";
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qcom,slpi_qrtr {
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qcom,glink-channels = "IPCRTR";
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qcom,low-latency;
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qcom,intents = <0x800 5
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0x2000 3
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0x4400 2>;
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};
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qcom,msm_fastrpc_rpmsg {
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compatible = "qcom,msm-fastrpc-rpmsg";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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};
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qcom,slpi_glink_ssr {
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qcom,glink-channels = "glink_ssr";
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qcom,notify-edges = <&glink_modem>,
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<&glink_adsp>,
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<&glink_cdsp>;
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};
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};
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glink_cdsp: cdsp {
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qcom,remote-pid = <5>;
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transport = "smem";
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mboxes = <&apss_shared 4>;
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mbox-names = "cdsp_smem";
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interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
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label = "cdsp";
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qcom,glink-label = "cdsp";
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qcom,cdsp_qrtr {
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qcom,glink-channels = "IPCRTR";
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qcom,intents = <0x800 5
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0x2000 3
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0x4400 2>;
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};
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qcom,msm_fastrpc_rpmsg {
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compatible = "qcom,msm-fastrpc-rpmsg";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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};
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qcom,cdsp_glink_ssr {
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qcom,glink-channels = "glink_ssr";
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qcom,notify-edges = <&glink_modem>,
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<&glink_adsp>,
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<&glink_slpi>;
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};
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};
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glink_spss: spss {
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qcom,remote-pid = <8>;
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transport = "spss";
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mboxes = <&sp_scsr 0>;
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mbox-names = "spss_spss";
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interrupt-parent = <&intsp>;
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interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x1885008 0x8>,
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<0x1885010 0x4>;
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reg-names = "qcom,spss-addr",
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"qcom,spss-size";
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label = "spss";
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qcom,glink-label = "spss";
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qcom,spss_glink_ssr {
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qcom,glink-channels = "glink_ssr";
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qcom,notify-edges = <&glink_modem>;
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};
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};
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glink_spi_xprt_wdsp: wdsp {
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qcom,remote-pid = <10>;
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transport = "spi";
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tx-descriptors = <0x12000 0x12004>;
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rx-descriptors = <0x1200c 0x12010>;
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label = "wdsp";
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qcom,glink-label = "wdsp";
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};
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};
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qcom,glinkpkt {
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compatible = "qcom,glinkpkt";
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qcom,glinkpkt-at-mdm0 {
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qcom,glinkpkt-edge = "mpss";
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qcom,glinkpkt-ch-name = "DS";
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qcom,glinkpkt-dev-name = "at_mdm0";
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};
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qcom,glinkpkt-apr-apps2 {
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qcom,glinkpkt-edge = "adsp";
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qcom,glinkpkt-ch-name = "apr_apps2";
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qcom,glinkpkt-dev-name = "apr_apps2";
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};
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qcom,glinkpkt-data40-cntl {
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qcom,glinkpkt-edge = "mpss";
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qcom,glinkpkt-ch-name = "DATA40_CNTL";
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qcom,glinkpkt-dev-name = "smdcntl8";
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};
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qcom,glinkpkt-data1 {
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qcom,glinkpkt-edge = "mpss";
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qcom,glinkpkt-ch-name = "DATA1";
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qcom,glinkpkt-dev-name = "smd7";
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};
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qcom,glinkpkt-data4 {
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qcom,glinkpkt-edge = "mpss";
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qcom,glinkpkt-ch-name = "DATA4";
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qcom,glinkpkt-dev-name = "smd8";
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};
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qcom,glinkpkt-data11 {
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qcom,glinkpkt-edge = "mpss";
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qcom,glinkpkt-ch-name = "DATA11";
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qcom,glinkpkt-dev-name = "smd11";
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};
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};
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qupv3_id_1: geniqup@ac0000 {
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compatible = "qcom,geni-se-qup";
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reg = <0x00ac0000 0x6000>;
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@ -784,3 +1076,4 @@
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#include "sdmshrike-pinctrl.dtsi"
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#include "sa8195-regulator.dtsi"
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#include "sm8150-pm.dtsi"
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#include "sa8195-smp2p.dtsi"
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