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mmc: dw_mmc: fixed wrong bit operation for SDMMC_GET_FCNT()
In status register, fifo_count is bit[29:17]. (0x1FFF is correct) Signed-off-by: Jaehoon Chung <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Acked-by: Will Newton <[email protected]> Signed-off-by: Chris Ball <[email protected]>
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@ -126,7 +126,7 @@
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#define SDMMC_CMD_RESP_EXP BIT(6)
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#define SDMMC_CMD_INDX(n) ((n) & 0x1F)
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/* Status register defines */
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#define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FF)
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#define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FFF)
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/* Internal DMAC interrupt defines */
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#define SDMMC_IDMAC_INT_AI BIT(9)
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#define SDMMC_IDMAC_INT_NI BIT(8)
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