From 977848406de4361e762adbb026f49686dc2bf9a5 Mon Sep 17 00:00:00 2001
From: Pavankumar Kondeti <pkondeti@qti.qualcomm.com>
Date: Wed, 24 Jun 2020 13:05:52 +0530
Subject: [PATCH] ARM: dts: msm: Update capacity-dmips-mhz values for Shima

Update capacity-dmips-mhz value for prime CPU in Shima.

Change-Id: I61f5a5229d9f8564b6a47bba25177c743a954319
---
 qcom/shima.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index eaaf34d2835c..2f0feb1f6f25 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -162,7 +162,7 @@
 			reg = <0x0 0x700>;
 			enable-method = "psci";
 			qcom,freq-domain = <&cpufreq_hw 2 4>;
-			capacity-dmips-mhz = <1946>;
+			capacity-dmips-mhz = <1985>;
 			dynamic-power-coefficient = <552>;
 			cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
 			next-level-cache = <&L2_7>;