diff --git a/hif/src/ipcie/if_ipci.c b/hif/src/ipcie/if_ipci.c
index 0939ea410005..0fef23ae3e4f 100644
--- a/hif/src/ipcie/if_ipci.c
+++ b/hif/src/ipcie/if_ipci.c
@@ -898,15 +898,16 @@ int hif_prevent_link_low_power_states(struct hif_opaque_softc *hif)
 {
 	struct hif_softc *scn = HIF_GET_SOFTC(hif);
 	struct hif_ipci_softc *ipci_scn = HIF_GET_IPCI_SOFTC(scn);
-	uint32_t timeout = 0;
+	uint32_t start_time = 0, curr_time = 0;
 
 	if (pld_is_pci_ep_awake(scn->qdf_dev->dev) == -ENOTSUPP)
 		return 0;
 
+	start_time = curr_time = qdf_system_ticks_to_msecs(qdf_system_ticks());
 	while (pld_is_pci_ep_awake(scn->qdf_dev->dev) &&
-	       timeout <= EP_WAKE_RESET_DELAY_TIMEOUT_US) {
+	       curr_time <= start_time + EP_WAKE_RESET_DELAY_TIMEOUT_MS) {
 		qdf_sleep_us(EP_WAKE_RESET_DELAY_US);
-		timeout += EP_WAKE_RESET_DELAY_US;
+		curr_time = qdf_system_ticks_to_msecs(qdf_system_ticks());
 	}
 
 	if (pld_is_pci_ep_awake(scn->qdf_dev->dev)) {
@@ -922,11 +923,11 @@ int hif_prevent_link_low_power_states(struct hif_opaque_softc *hif)
 	}
 
 	ipci_scn->prevent_l1 = true;
-	timeout = 0;
+	start_time = curr_time = qdf_system_ticks_to_msecs(qdf_system_ticks());
 	while (!pld_is_pci_ep_awake(scn->qdf_dev->dev) &&
-	       timeout <= EP_WAKE_DELAY_TIMEOUT_US) {
+	       curr_time <= start_time + EP_WAKE_DELAY_TIMEOUT_MS) {
 		qdf_sleep_us(EP_WAKE_DELAY_US);
-		timeout += EP_WAKE_DELAY_US;
+		curr_time = qdf_system_ticks_to_msecs(qdf_system_ticks());
 	}
 
 	if (pld_is_pci_ep_awake(scn->qdf_dev->dev) <= 0) {
diff --git a/hif/src/ipcie/if_ipci.h b/hif/src/ipcie/if_ipci.h
index 5d899a1c0aef..000e1a350f9f 100644
--- a/hif/src/ipcie/if_ipci.h
+++ b/hif/src/ipcie/if_ipci.h
@@ -65,11 +65,11 @@ struct hif_ipci_stats {
 
 #ifdef FEATURE_HAL_DELAYED_REG_WRITE
 #ifdef HAL_CONFIG_SLUB_DEBUG_ON
-#define EP_WAKE_RESET_DELAY_TIMEOUT_US 3000
-#define EP_WAKE_DELAY_TIMEOUT_US 7000
+#define EP_WAKE_RESET_DELAY_TIMEOUT_MS 3
+#define EP_WAKE_DELAY_TIMEOUT_MS 7
 #else
-#define EP_WAKE_RESET_DELAY_TIMEOUT_US 10000
-#define EP_WAKE_DELAY_TIMEOUT_US 10000
+#define EP_WAKE_RESET_DELAY_TIMEOUT_MS 10
+#define EP_WAKE_DELAY_TIMEOUT_MS 10
 #endif
 #define EP_WAKE_RESET_DELAY_US 50
 #define EP_WAKE_DELAY_US 200