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msm: kgsl: Add GPUCC register dumps to A6xx GPU snapshot

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GPUCC registers are valid for all A6xx GPUs. Hence add
these register to A6xx snapshot dumping.

Change-Id: I6b8d1a856ed096afff7d22b4382ec6ac09b7b1fb
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
This commit is contained in:
Hareesh Gundu 2020-07-15 17:36:36 +05:30
commit ef6895a677
1 changed files with 11 additions and 4 deletions
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15
drivers/gpu/msm/adreno_a6xx_snapshot.c
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@ -319,6 +319,12 @@ static const unsigned int a6xx_gmu_wrapper_registers[] = {
0x1f840, 0x1f840, 0x1f844, 0x1f845, 0x1f887, 0x1f889,
/* GMU AO*/
0x23b0C, 0x23b0E, 0x23b15, 0x23b15,
/* GPU CC */
0x24000, 0x24012, 0x24040, 0x24052, 0x24400, 0x24404, 0x24407, 0x2440B,
0x24415, 0x2441C, 0x2441E, 0x2442D, 0x2443C, 0x2443D, 0x2443F, 0x24440,
0x24442, 0x24449, 0x24458, 0x2445A, 0x24540, 0x2455E, 0x24800, 0x24802,
0x24C00, 0x24C02, 0x25400, 0x25402, 0x25800, 0x25802, 0x25C00, 0x25C02,
0x26000, 0x26002,
};
enum a6xx_debugbus_id {
@ -1692,12 +1698,13 @@ void a6xx_snapshot(struct adreno_device *adreno_dev,
kgsl_snapshot_add_section(device, KGSL_SNAPSHOT_SECTION_REGS,
snapshot, a6xx_snapshot_isense_registers, &r);
} else if (adreno_is_a610(adreno_dev)) {
adreno_snapshot_registers(device, snapshot,
a6xx_gmu_wrapper_registers,
ARRAY_SIZE(a6xx_gmu_wrapper_registers) / 2);
}
if (!gmu_core_isenabled(device))
adreno_snapshot_registers(device, snapshot,
a6xx_gmu_wrapper_registers,
ARRAY_SIZE(a6xx_gmu_wrapper_registers) / 2);
sptprac_on = gpudev->sptprac_is_on(adreno_dev);
if (!gmu_core_dev_gx_is_on(device))