From 13cddf25e631d5d803bd597cfc78b3f5274b75ae Mon Sep 17 00:00:00 2001 From: Liam Mark Date: Fri, 7 Aug 2020 08:21:18 -0700 Subject: [PATCH] ARM: dts: msm: Add addtional KGSL SMMU clocks Add the following clocks to the list of clocks to vote for in order to access the KGSL SMMU register space: - GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK - GPU_CC_CX_GMU_CLK - GPU_CC_HUB_CX_INT_CLK - GPU_CC_HUB_AON_CLK. Change-Id: I3b41afc2e01470318ebf21edc2bb78b0421c76db --- qcom/msm-arm-smmu-lahaina.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/qcom/msm-arm-smmu-lahaina.dtsi b/qcom/msm-arm-smmu-lahaina.dtsi index 549022958c79..de6054d5d612 100644 --- a/qcom/msm-arm-smmu-lahaina.dtsi +++ b/qcom/msm-arm-smmu-lahaina.dtsi @@ -20,10 +20,19 @@ clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, - <&clock_gpucc GPU_CC_AHB_CLK>; + <&clock_gpucc GPU_CC_AHB_CLK>, + <&clock_gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, + <&clock_gpucc GPU_CC_CX_GMU_CLK>, + <&clock_gpucc GPU_CC_HUB_CX_INT_CLK>, + <&clock_gpucc GPU_CC_HUB_AON_CLK>; + clock-names = "gcc_gpu_memnoc_gfx", "gcc_gpu_snoc_dvm_gfx", - "gpu_cc_ahb"; + "gpu_cc_ahb", + "gpu_cc_hlos1_vote_gpu_smmu_clk", + "gpu_cc_cx_gmu_clk", + "gpu_cc_hub_cx_int_clk", + "gpu_cc_hub_aon_clk"; interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;