A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add IPA DT entry for sdxnightjar target"

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qctecmdr 2021-01-05 00:35:22 -08:00 • committed by Gerrit - the friendly Code Review server
commit f033f4158b
1 changed files with 85 additions and 0 deletions
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85
qcom/sdxnightjar.dtsi
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@ -598,6 +598,19 @@
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_ipa_1_out: qcom,smp2p-ipa-1-out {
qcom,entry-name = "ipa";
#qcom,smem-state-cells = <1>;
};
/* ipa - inbound entry from mss */
smp2p_ipa_1_in: qcom,smp2p-ipa-1-in {
qcom,entry-name = "ipa";
interrupt-controller;
#interrupt-cells = <2>;
};
};
qnand_1: nand@7980000 {
@ -718,6 +731,78 @@
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
<&rpmcc RPM_SMD_SNOC_A_CLK>;
};
qcom,msm_gsi {
compatible = "qcom,msm_gsi";
};
qcom,rmnet-ipa {
compatible = "qcom,rmnet-ipa3";
qcom,rmnet-ipa-ssr;
};
ipa_hw: qcom,ipa@07B00000 {
compatible = "qcom,ipa";
reg = <0x07B00000 0x34000>,
<0x07B84000 0x31FFFF>,
<0x07B04000 0x2C000>;
reg-names = "ipa-base", "bam-base", "gsi-base";
interrupts =
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ipa-irq", "bam-irq", "gsi-irq";
qcom,ipa-hw-ver = <10>; /* IPA core version = IPAv3.0 */
qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */
qcom,platform-type = <0>; /* MDM platform */
qcom,ee = <0>;
qcom,use-rg10-limitation-mitigation;
qcom,use-ipa-tethering-bridge;
qcom,modem-cfg-emb-pipe-flt;
clock-names = "core_clk";
clocks = <&rpmcc RPM_SMD_IPA_CLK>;
qcom,interconnect,num-cases = <5>;
qcom,interconnect,num-paths = <3>;
interconnects = <&system_noc MASTER_IPA &bimc SLAVE_EBI_CH0>,
<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
<&bimc MASTER_AMPSS_M0 &pc_noc SLAVE_IPA_CFG>;
interconnect-names = "ipa_to_ebi1", "ipa_to_imem", "appss_to_ipa";
/* No vote */
qcom,no-vote =
<0 0 0 0 0 0>;
/* SVS2 */
qcom,svs2 =
<80000 64000 80000 64000 80000 16000>;
/* SVS */
qcom,svs =
<80000 640000 80000 640000 80000 160000>;
/* NOMINAL */
qcom,nominal =
<206000 960000 206000 960000 206000 400000>;
/* TURBO */
qcom,turbo =
<206000 3600000 206000 3600000 206000 960000>;
qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", "TURBO";
qcom,throughput-threshold = <310 600 1000>;
qcom,scaling-exceptions = <>;
/* ipa tz unlock registers */
qcom,ipa-tz-unlock-reg =
<0x4043583c 0x1000>; /* 32-bit reg addr and size */
/* smp2p gpio information */
qcom,smp2pgpio_map_ipa_1_out {
compatible = "qcom,smp2p-map-ipa-1-out";
qcom,smem-states = <&smp2p_ipa_1_out 0>;
qcom,smem-state-names = "ipa-smp2p-out";
};
qcom,smp2pgpio_map_ipa_1_in {
compatible = "qcom,smp2p-map-ipa-1-in";
interrupts-extended = <&smp2p_ipa_1_in 0 0>;
interrupt-names = "ipa-smp2p-in";
};
};
};
#include "pmd9650.dtsi"