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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
Merge "iio: adc: Add support for PMIC7 VADC"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
f096eb3342
9 changed files with 874 additions and 8 deletions
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/bitops.h>
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@ -23,6 +23,7 @@
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#define ADC5_USR_REVISION1 0x0
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#define ADC5_USR_STATUS1 0x8
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#define ADC5_USR_STATUS1_CONV_FAULT BIT(7)
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#define ADC5_USR_STATUS1_REQ_STS BIT(1)
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#define ADC5_USR_STATUS1_EOC BIT(0)
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#define ADC5_USR_STATUS1_REQ_STS_EOC_MASK 0x3
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@ -65,6 +66,9 @@
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#define ADC5_USR_IBAT_DATA1 0x53
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#define ADC_CHANNEL_OFFSET 0x8
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#define ADC_CHANNEL_MASK 0xff
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/*
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* Conversion time varies based on the decimation, clock rate, fast average
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* samples and measurements queued across different VADC peripherals.
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@ -79,6 +83,11 @@
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#define ADC5_HW_SETTLE_DIFF_MINOR 3
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#define ADC5_HW_SETTLE_DIFF_MAJOR 5
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/* For PMIC7 */
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#define ADC_APP_SID 0x40
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#define ADC_APP_SID_MASK 0xf
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#define ADC7_CONV_TIMEOUT msecs_to_jiffies(10)
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enum adc5_cal_method {
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ADC5_NO_CAL = 0,
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ADC5_RATIOMETRIC_CAL,
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@ -96,6 +105,7 @@ enum adc5_cal_val {
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* @cal_method: calibration method.
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* @cal_val: calibration value
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* @decimation: sampling rate supported for the channel.
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* @sid: slave id of PMIC owning the channel, for PMIC7.
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* @prescale: channel scaling performed on the input signal.
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* @hw_settle_time: the time between AMUX being configured and the
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* start of conversion.
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@ -110,6 +120,7 @@ struct adc5_channel_prop {
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enum adc5_cal_method cal_method;
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enum adc5_cal_val cal_val;
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unsigned int decimation;
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unsigned int sid;
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unsigned int prescale;
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unsigned int hw_settle_time;
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unsigned int avg_samples;
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@ -140,6 +151,7 @@ struct adc5_chip {
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bool poll_eoc;
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struct completion complete;
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struct mutex lock;
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bool is_pmic7;
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const struct adc5_data *data;
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};
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@ -165,6 +177,11 @@ static int adc5_write(struct adc5_chip *adc, u16 offset, u8 *data, int len)
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return regmap_bulk_write(adc->regmap, adc->base + offset, data, len);
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}
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static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8 val)
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{
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return regmap_update_bits(adc->regmap, adc->base + offset, mask, val);
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}
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static int adc5_prescaling_from_dt(u32 num, u32 den)
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{
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unsigned int pre;
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@ -314,6 +331,49 @@ static int adc5_configure(struct adc5_chip *adc,
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return adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
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}
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static int adc7_configure(struct adc5_chip *adc,
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struct adc5_channel_prop *prop)
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{
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int ret;
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u8 conv_req = 0, buf[4];
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ret = adc5_masked_write(adc, ADC_APP_SID, ADC_APP_SID_MASK, prop->sid);
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if (ret)
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return ret;
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ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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/* Digital param selection */
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adc5_update_dig_param(adc, prop, &buf[0]);
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/* Update fast average sample value */
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buf[1] &= (u8) ~ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK;
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buf[1] |= prop->avg_samples;
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/* Select ADC channel */
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buf[2] = prop->channel;
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/* Select HW settle delay for channel */
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buf[3] &= (u8) ~ADC5_USR_HW_SETTLE_DELAY_MASK;
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buf[3] |= prop->hw_settle_time;
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/* Select CONV request */
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conv_req = ADC5_USR_CONV_REQ_REQ;
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if (!adc->poll_eoc)
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reinit_completion(&adc->complete);
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ret = adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
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if (ret)
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return ret;
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ret = adc5_write(adc, ADC5_USR_CONV_REQ, &conv_req, 1);
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return ret;
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}
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static int adc5_do_conversion(struct adc5_chip *adc,
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struct adc5_channel_prop *prop,
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struct iio_chan_spec const *chan,
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@ -355,6 +415,44 @@ unlock:
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return ret;
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}
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static int adc7_do_conversion(struct adc5_chip *adc,
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struct adc5_channel_prop *prop,
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struct iio_chan_spec const *chan,
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u16 *data_volt, u16 *data_cur)
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{
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int ret;
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u8 status = 0;
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mutex_lock(&adc->lock);
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ret = adc7_configure(adc, prop);
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if (ret) {
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pr_err("ADC configure failed with %d\n", ret);
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goto unlock;
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}
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/* No support for polling mode at present*/
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wait_for_completion_timeout(&adc->complete,
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ADC7_CONV_TIMEOUT);
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ret = adc5_read(adc, ADC5_USR_STATUS1, &status, 1);
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if (ret < 0)
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goto unlock;
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if (status & ADC5_USR_STATUS1_CONV_FAULT) {
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pr_err("Unexpected conversion fault\n");
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ret = -EIO;
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goto unlock;
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}
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ret = adc5_read_voltage_data(adc, data_volt);
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unlock:
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mutex_unlock(&adc->lock);
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return ret;
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}
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static irqreturn_t adc5_isr(int irq, void *dev_id)
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{
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struct adc5_chip *adc = dev_id;
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@ -377,6 +475,66 @@ static int adc5_of_xlate(struct iio_dev *indio_dev,
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return -EINVAL;
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}
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static int adc7_of_xlate(struct iio_dev *indio_dev,
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const struct of_phandle_args *iiospec)
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{
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struct adc5_chip *adc = iio_priv(indio_dev);
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int i, v_channel;
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for (i = 0; i < adc->nchannels; i++) {
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v_channel = ((adc->chan_props[i].sid << ADC_CHANNEL_OFFSET) |
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adc->chan_props[i].channel);
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if (v_channel == iiospec->args[0])
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return i;
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}
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return -EINVAL;
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}
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static int adc7_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2,
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long mask)
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{
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struct adc5_chip *adc = iio_priv(indio_dev);
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struct adc5_channel_prop *prop;
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u16 adc_code_volt, adc_code_cur;
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int ret;
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prop = &adc->chan_props[chan->address];
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switch (mask) {
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case IIO_CHAN_INFO_PROCESSED:
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ret = adc7_do_conversion(adc, prop, chan,
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&adc_code_volt, &adc_code_cur);
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if (ret)
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return ret;
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ret = qcom_adc5_hw_scale(prop->scale_fn_type,
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&adc5_prescale_ratios[prop->prescale],
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adc->data,
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adc_code_volt, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_RAW:
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ret = adc7_do_conversion(adc, prop, chan,
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&adc_code_volt, &adc_code_cur);
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if (ret)
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return ret;
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*val = (int)adc_code_volt;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int adc5_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2,
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long mask)
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@ -391,7 +549,7 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
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switch (mask) {
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case IIO_CHAN_INFO_PROCESSED:
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ret = adc5_do_conversion(adc, prop, chan,
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&adc_code_volt, &adc_code_cur);
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&adc_code_volt, &adc_code_cur);
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if (ret)
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return ret;
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@ -415,6 +573,11 @@ static const struct iio_info adc5_info = {
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.of_xlate = adc5_of_xlate,
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};
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static const struct iio_info adc7_info = {
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.read_raw = adc7_read_raw,
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.of_xlate = adc7_of_xlate,
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};
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struct adc5_channels {
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const char *datasheet_name;
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unsigned int prescale_index;
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@ -477,6 +640,39 @@ static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = {
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SCALE_HW_CALIB_PM5_SMB_TEMP)
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};
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static const struct adc5_channels adc7_chans_pmic[ADC5_MAX_CHANNEL] = {
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[ADC7_REF_GND] = ADC5_CHAN_VOLT("ref_gnd", 0,
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SCALE_HW_CALIB_DEFAULT)
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[ADC7_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 0,
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SCALE_HW_CALIB_DEFAULT)
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[ADC7_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 1,
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SCALE_HW_CALIB_DEFAULT)
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[ADC7_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 3,
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SCALE_HW_CALIB_DEFAULT)
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[ADC7_DIE_TEMP] = ADC5_CHAN_TEMP("die_temp", 0,
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SCALE_HW_CALIB_PMIC_THERM_PM7)
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[ADC7_AMUX_THM1_100K_PU] = ADC5_CHAN_TEMP("amux_thm1_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_AMUX_THM2_100K_PU] = ADC5_CHAN_TEMP("amux_thm2_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_AMUX_THM3_100K_PU] = ADC5_CHAN_TEMP("amux_thm3_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_AMUX_THM4_100K_PU] = ADC5_CHAN_TEMP("amux_thm4_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_AMUX_THM5_100K_PU] = ADC5_CHAN_TEMP("amux_thm5_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_AMUX_THM6_100K_PU] = ADC5_CHAN_TEMP("amux_thm6_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_GPIO1_100K_PU] = ADC5_CHAN_TEMP("gpio1_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_GPIO2_100K_PU] = ADC5_CHAN_TEMP("gpio2_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_GPIO3_100K_PU] = ADC5_CHAN_TEMP("gpio3_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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[ADC7_GPIO4_100K_PU] = ADC5_CHAN_TEMP("gpio4_pu2", 0,
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SCALE_HW_CALIB_THERM_100K_PU_PM7)
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};
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static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = {
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[ADC5_REF_GND] = ADC5_CHAN_VOLT("ref_gnd", 0,
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SCALE_HW_CALIB_DEFAULT)
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|
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@ -511,6 +707,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
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{
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const char *name = node->name, *channel_name;
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u32 chan, value, varr[2];
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u32 sid = 0;
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int ret;
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struct device *dev = adc->dev;
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@ -520,6 +717,15 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
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return ret;
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}
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/*
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* Value read from "reg" is virtual channel number
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* virtual channel number = (sid << 8 | channel number).
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*/
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if (adc->is_pmic7) {
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sid = (chan >> ADC_CHANNEL_OFFSET);
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chan = (chan & ADC_CHANNEL_MASK);
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}
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if (chan > ADC5_PARALLEL_ISENSE_VBAT_IDATA ||
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!data->adc_chans[chan].datasheet_name) {
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dev_err(dev, "%s invalid channel number %d\n", name, chan);
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|
|
@ -528,6 +734,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
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/* the channel has DT description */
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prop->channel = chan;
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prop->sid = sid;
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|
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channel_name = of_get_property(node,
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"label", NULL) ? : node->name;
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|
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@ -578,8 +785,9 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
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pr_debug("dig_ver:minor:%d, major:%d\n", dig_version[0],
|
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dig_version[1]);
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/* Digital controller >= 5.3 have hw_settle_2 option */
|
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if (dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR &&
|
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dig_version[1] >= ADC5_HW_SETTLE_DIFF_MAJOR)
|
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if ((dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR &&
|
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dig_version[1] >= ADC5_HW_SETTLE_DIFF_MAJOR) ||
|
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(adc->is_pmic7))
|
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ret = adc5_hw_settle_time_from_dt(value,
|
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data->hw_settle_2);
|
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else
|
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|
|
@ -609,6 +817,11 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
|
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prop->avg_samples = VADC_DEF_AVG_SAMPLES;
|
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}
|
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|
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prop->scale_fn_type = -EINVAL;
|
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ret = of_property_read_u32(node, "qcom,scale-fn-type", &value);
|
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if (!ret && value < SCALE_HW_CALIB_INVALID)
|
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prop->scale_fn_type = value;
|
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|
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if (of_property_read_bool(node, "qcom,ratiometric"))
|
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prop->cal_method = ADC5_RATIOMETRIC_CAL;
|
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else
|
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|
|
@ -639,6 +852,16 @@ static const struct adc5_data adc5_data_pmic = {
|
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1, 2, 4, 8, 16, 32, 64, 128},
|
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};
|
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|
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static const struct adc5_data adc7_data_pmic = {
|
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.adc_chans = adc7_chans_pmic,
|
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.decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX])
|
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{85, 340, 1360},
|
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.hw_settle_2 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX])
|
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{15, 100, 200, 300, 400, 500, 600, 700,
|
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1000, 2000, 4000, 8000, 16000, 32000,
|
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64000, 128000},
|
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};
|
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|
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static const struct adc5_data adc5_data_pmic_rev2 = {
|
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.full_scale_code_volt = 0x4000,
|
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.full_scale_code_cur = 0x1800,
|
||||
|
|
@ -658,6 +881,10 @@ static const struct of_device_id adc5_match_table[] = {
|
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.compatible = "qcom,spmi-adc5",
|
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.data = &adc5_data_pmic,
|
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},
|
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{
|
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.compatible = "qcom,spmi-adc7",
|
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.data = &adc7_data_pmic,
|
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},
|
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{
|
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.compatible = "qcom,spmi-adc-rev2",
|
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.data = &adc5_data_pmic_rev2,
|
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|
|
@ -707,8 +934,9 @@ static int adc5_get_dt_data(struct adc5_chip *adc, struct device_node *node)
|
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return ret;
|
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}
|
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|
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prop.scale_fn_type =
|
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data->adc_chans[prop.channel].scale_fn_type;
|
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if (prop.scale_fn_type == -EINVAL)
|
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prop.scale_fn_type =
|
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data->adc_chans[prop.channel].scale_fn_type;
|
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*chan_props = prop;
|
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adc_chan = &data->adc_chans[prop.channel];
|
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|
||||
|
|
@ -752,6 +980,16 @@ static int adc5_probe(struct platform_device *pdev)
|
|||
adc->regmap = regmap;
|
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adc->dev = dev;
|
||||
adc->base = reg;
|
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|
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platform_set_drvdata(pdev, adc);
|
||||
|
||||
if (of_device_is_compatible(node, "qcom,spmi-adc7")) {
|
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indio_dev->info = &adc7_info;
|
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adc->is_pmic7 = true;
|
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} else {
|
||||
indio_dev->info = &adc5_info;
|
||||
}
|
||||
|
||||
init_completion(&adc->complete);
|
||||
mutex_init(&adc->lock);
|
||||
|
||||
|
|
@ -777,19 +1015,27 @@ static int adc5_probe(struct platform_device *pdev)
|
|||
indio_dev->dev.of_node = node;
|
||||
indio_dev->name = pdev->name;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->info = &adc5_info;
|
||||
indio_dev->channels = adc->iio_chans;
|
||||
indio_dev->num_channels = adc->nchannels;
|
||||
|
||||
return devm_iio_device_register(dev, indio_dev);
|
||||
}
|
||||
|
||||
static int adc5_exit(struct platform_device *pdev)
|
||||
{
|
||||
struct adc5_chip *adc = platform_get_drvdata(pdev);
|
||||
|
||||
mutex_destroy(&adc->lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver adc5_driver = {
|
||||
.driver = {
|
||||
.name = "qcom-spmi-adc5.c",
|
||||
.of_match_table = adc5_match_table,
|
||||
},
|
||||
.probe = adc5_probe,
|
||||
.remove = adc5_exit,
|
||||
};
|
||||
module_platform_driver(adc5_driver);
|
||||
|
||||
|
|
|
|||
|
|
@ -88,6 +88,195 @@ static const struct vadc_map_pt adcmap_100k_104ef_104fb_1875_vref[] = {
|
|||
{ 46, 125000 },
|
||||
};
|
||||
|
||||
static const struct vadc_map_pt adcmap7_die_temp[] = {
|
||||
{ 433700, 1967},
|
||||
{ 473100, 1964},
|
||||
{ 512400, 1957},
|
||||
{ 551500, 1949},
|
||||
{ 590500, 1940},
|
||||
{ 629300, 1930},
|
||||
{ 667900, 1921},
|
||||
{ 706400, 1910},
|
||||
{ 744600, 1896},
|
||||
{ 782500, 1878},
|
||||
{ 820100, 1859},
|
||||
{ 857300, 0},
|
||||
};
|
||||
|
||||
/*
|
||||
* Resistance to temperature table for 100k pull up for NTCG104EF104.
|
||||
*/
|
||||
static const struct vadc_map_pt adcmap7_100k[] = {
|
||||
{ 4250657, -40960 },
|
||||
{ 3962085, -39936 },
|
||||
{ 3694875, -38912 },
|
||||
{ 3447322, -37888 },
|
||||
{ 3217867, -36864 },
|
||||
{ 3005082, -35840 },
|
||||
{ 2807660, -34816 },
|
||||
{ 2624405, -33792 },
|
||||
{ 2454218, -32768 },
|
||||
{ 2296094, -31744 },
|
||||
{ 2149108, -30720 },
|
||||
{ 2012414, -29696 },
|
||||
{ 1885232, -28672 },
|
||||
{ 1766846, -27648 },
|
||||
{ 1656598, -26624 },
|
||||
{ 1553884, -25600 },
|
||||
{ 1458147, -24576 },
|
||||
{ 1368873, -23552 },
|
||||
{ 1285590, -22528 },
|
||||
{ 1207863, -21504 },
|
||||
{ 1135290, -20480 },
|
||||
{ 1067501, -19456 },
|
||||
{ 1004155, -18432 },
|
||||
{ 944935, -17408 },
|
||||
{ 889550, -16384 },
|
||||
{ 837731, -15360 },
|
||||
{ 789229, -14336 },
|
||||
{ 743813, -13312 },
|
||||
{ 701271, -12288 },
|
||||
{ 661405, -11264 },
|
||||
{ 624032, -10240 },
|
||||
{ 588982, -9216 },
|
||||
{ 556100, -8192 },
|
||||
{ 525239, -7168 },
|
||||
{ 496264, -6144 },
|
||||
{ 469050, -5120 },
|
||||
{ 443480, -4096 },
|
||||
{ 419448, -3072 },
|
||||
{ 396851, -2048 },
|
||||
{ 375597, -1024 },
|
||||
{ 355598, 0 },
|
||||
{ 336775, 1024 },
|
||||
{ 319052, 2048 },
|
||||
{ 302359, 3072 },
|
||||
{ 286630, 4096 },
|
||||
{ 271806, 5120 },
|
||||
{ 257829, 6144 },
|
||||
{ 244646, 7168 },
|
||||
{ 232209, 8192 },
|
||||
{ 220471, 9216 },
|
||||
{ 209390, 10240 },
|
||||
{ 198926, 11264 },
|
||||
{ 189040, 12288 },
|
||||
{ 179698, 13312 },
|
||||
{ 170868, 14336 },
|
||||
{ 162519, 15360 },
|
||||
{ 154622, 16384 },
|
||||
{ 147150, 17408 },
|
||||
{ 140079, 18432 },
|
||||
{ 133385, 19456 },
|
||||
{ 127046, 20480 },
|
||||
{ 121042, 21504 },
|
||||
{ 115352, 22528 },
|
||||
{ 109960, 23552 },
|
||||
{ 104848, 24576 },
|
||||
{ 100000, 25600 },
|
||||
{ 95402, 26624 },
|
||||
{ 91038, 27648 },
|
||||
{ 86897, 28672 },
|
||||
{ 82965, 29696 },
|
||||
{ 79232, 30720 },
|
||||
{ 75686, 31744 },
|
||||
{ 72316, 32768 },
|
||||
{ 69114, 33792 },
|
||||
{ 66070, 34816 },
|
||||
{ 63176, 35840 },
|
||||
{ 60423, 36864 },
|
||||
{ 57804, 37888 },
|
||||
{ 55312, 38912 },
|
||||
{ 52940, 39936 },
|
||||
{ 50681, 40960 },
|
||||
{ 48531, 41984 },
|
||||
{ 46482, 43008 },
|
||||
{ 44530, 44032 },
|
||||
{ 42670, 45056 },
|
||||
{ 40897, 46080 },
|
||||
{ 39207, 47104 },
|
||||
{ 37595, 48128 },
|
||||
{ 36057, 49152 },
|
||||
{ 34590, 50176 },
|
||||
{ 33190, 51200 },
|
||||
{ 31853, 52224 },
|
||||
{ 30577, 53248 },
|
||||
{ 29358, 54272 },
|
||||
{ 28194, 55296 },
|
||||
{ 27082, 56320 },
|
||||
{ 26020, 57344 },
|
||||
{ 25004, 58368 },
|
||||
{ 24033, 59392 },
|
||||
{ 23104, 60416 },
|
||||
{ 22216, 61440 },
|
||||
{ 21367, 62464 },
|
||||
{ 20554, 63488 },
|
||||
{ 19776, 64512 },
|
||||
{ 19031, 65536 },
|
||||
{ 18318, 66560 },
|
||||
{ 17636, 67584 },
|
||||
{ 16982, 68608 },
|
||||
{ 16355, 69632 },
|
||||
{ 15755, 70656 },
|
||||
{ 15180, 71680 },
|
||||
{ 14628, 72704 },
|
||||
{ 14099, 73728 },
|
||||
{ 13592, 74752 },
|
||||
{ 13106, 75776 },
|
||||
{ 12640, 76800 },
|
||||
{ 12192, 77824 },
|
||||
{ 11762, 78848 },
|
||||
{ 11350, 79872 },
|
||||
{ 10954, 80896 },
|
||||
{ 10574, 81920 },
|
||||
{ 10209, 82944 },
|
||||
{ 9858, 83968 },
|
||||
{ 9521, 84992 },
|
||||
{ 9197, 86016 },
|
||||
{ 8886, 87040 },
|
||||
{ 8587, 88064 },
|
||||
{ 8299, 89088 },
|
||||
{ 8023, 90112 },
|
||||
{ 7757, 91136 },
|
||||
{ 7501, 92160 },
|
||||
{ 7254, 93184 },
|
||||
{ 7017, 94208 },
|
||||
{ 6789, 95232 },
|
||||
{ 6570, 96256 },
|
||||
{ 6358, 97280 },
|
||||
{ 6155, 98304 },
|
||||
{ 5959, 99328 },
|
||||
{ 5770, 100352 },
|
||||
{ 5588, 101376 },
|
||||
{ 5412, 102400 },
|
||||
{ 5243, 103424 },
|
||||
{ 5080, 104448 },
|
||||
{ 4923, 105472 },
|
||||
{ 4771, 106496 },
|
||||
{ 4625, 107520 },
|
||||
{ 4484, 108544 },
|
||||
{ 4348, 109568 },
|
||||
{ 4217, 110592 },
|
||||
{ 4090, 111616 },
|
||||
{ 3968, 112640 },
|
||||
{ 3850, 113664 },
|
||||
{ 3736, 114688 },
|
||||
{ 3626, 115712 },
|
||||
{ 3519, 116736 },
|
||||
{ 3417, 117760 },
|
||||
{ 3317, 118784 },
|
||||
{ 3221, 119808 },
|
||||
{ 3129, 120832 },
|
||||
{ 3039, 121856 },
|
||||
{ 2952, 122880 },
|
||||
{ 2868, 123904 },
|
||||
{ 2787, 124928 },
|
||||
{ 2709, 125952 },
|
||||
{ 2633, 126976 },
|
||||
{ 2560, 128000 },
|
||||
{ 2489, 129024 },
|
||||
{ 2420, 130048 }
|
||||
};
|
||||
|
||||
static int qcom_vadc_scale_hw_calib_volt(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
|
|
@ -96,6 +285,10 @@ static int qcom_vadc_scale_hw_calib_therm(
|
|||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
u16 adc_code, int *result_mdec);
|
||||
static int qcom_vadc7_scale_hw_calib_therm(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
u16 adc_code, int *result_mdec);
|
||||
static int qcom_vadc_scale_hw_smb_temp(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
|
|
@ -108,12 +301,20 @@ static int qcom_vadc_scale_hw_calib_die_temp(
|
|||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
u16 adc_code, int *result_mdec);
|
||||
static int qcom_vadc7_scale_hw_calib_die_temp(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
u16 adc_code, int *result_mdec);
|
||||
|
||||
static struct qcom_adc5_scale_type scale_adc5_fn[] = {
|
||||
[SCALE_HW_CALIB_DEFAULT] = {qcom_vadc_scale_hw_calib_volt},
|
||||
[SCALE_HW_CALIB_THERM_100K_PULLUP] = {qcom_vadc_scale_hw_calib_therm},
|
||||
[SCALE_HW_CALIB_XOTHERM] = {qcom_vadc_scale_hw_calib_therm},
|
||||
[SCALE_HW_CALIB_THERM_100K_PU_PM7] = {
|
||||
qcom_vadc7_scale_hw_calib_therm},
|
||||
[SCALE_HW_CALIB_PMIC_THERM] = {qcom_vadc_scale_hw_calib_die_temp},
|
||||
[SCALE_HW_CALIB_PMIC_THERM_PM7] = {
|
||||
qcom_vadc7_scale_hw_calib_die_temp},
|
||||
[SCALE_HW_CALIB_PM5_CHG_TEMP] = {qcom_vadc_scale_hw_chg5_temp},
|
||||
[SCALE_HW_CALIB_PM5_SMB_TEMP] = {qcom_vadc_scale_hw_smb_temp},
|
||||
};
|
||||
|
|
@ -291,6 +492,32 @@ static int qcom_vadc_scale_code_voltage_factor(u16 adc_code,
|
|||
return (int) voltage;
|
||||
}
|
||||
|
||||
static int qcom_vadc7_scale_hw_calib_therm(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
u16 adc_code, int *result_mdec)
|
||||
{
|
||||
s64 resistance = 0;
|
||||
int ret, result = 0;
|
||||
|
||||
if (adc_code >= RATIO_MAX_ADC7)
|
||||
return -EINVAL;
|
||||
|
||||
/* (ADC code * R_PULLUP (100Kohm)) / (full_scale_code - ADC code)*/
|
||||
resistance = (s64) adc_code * R_PU_100K;
|
||||
resistance = div64_s64(resistance, (RATIO_MAX_ADC7 - adc_code));
|
||||
|
||||
ret = qcom_vadc_map_voltage_temp(adcmap7_100k,
|
||||
ARRAY_SIZE(adcmap7_100k),
|
||||
resistance, &result);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
*result_mdec = result;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_vadc_scale_hw_calib_volt(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
|
|
@ -330,6 +557,38 @@ static int qcom_vadc_scale_hw_calib_die_temp(
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_vadc7_scale_hw_calib_die_temp(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
u16 adc_code, int *result_mdec)
|
||||
{
|
||||
|
||||
int voltage, vtemp0, temp, i = 0;
|
||||
|
||||
voltage = qcom_vadc_scale_code_voltage_factor(adc_code,
|
||||
prescale, data, 1);
|
||||
|
||||
while (i < ARRAY_SIZE(adcmap7_die_temp)) {
|
||||
if (adcmap7_die_temp[i].x > voltage)
|
||||
break;
|
||||
i++;
|
||||
}
|
||||
|
||||
if (i == 0) {
|
||||
*result_mdec = DIE_TEMP_ADC7_SCALE_1;
|
||||
} else if (i == ARRAY_SIZE(adcmap7_die_temp)) {
|
||||
*result_mdec = DIE_TEMP_ADC7_MAX;
|
||||
} else {
|
||||
vtemp0 = adcmap7_die_temp[i-1].x;
|
||||
voltage = voltage - vtemp0;
|
||||
temp = voltage/(adcmap7_die_temp[i-1].y);
|
||||
temp += DIE_TEMP_ADC7_SCALE_1 + (DIE_TEMP_ADC7_SCALE_2 * (i-1));
|
||||
*result_mdec = temp;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_vadc_scale_hw_smb_temp(
|
||||
const struct vadc_prescale_ratio *prescale,
|
||||
const struct adc5_data *data,
|
||||
|
|
|
|||
|
|
@ -50,6 +50,13 @@
|
|||
#define ADC5_FULL_SCALE_CODE 0x70e4
|
||||
#define ADC5_USR_DATA_CHECK 0x8000
|
||||
|
||||
#define R_PU_100K 100000
|
||||
#define RATIO_MAX_ADC7 0x4000
|
||||
|
||||
#define DIE_TEMP_ADC7_SCALE_1 -60
|
||||
#define DIE_TEMP_ADC7_SCALE_2 20
|
||||
#define DIE_TEMP_ADC7_MAX 160
|
||||
|
||||
/**
|
||||
* struct vadc_map_pt - Map the graph representation for ADC channel
|
||||
* @x: Represent the ADC digitized code.
|
||||
|
|
@ -111,8 +118,12 @@ struct vadc_prescale_ratio {
|
|||
* lookup table. The hardware applies offset/slope to adc code.
|
||||
* SCALE_HW_CALIB_XOTHERM: Returns XO thermistor voltage in millidegC using
|
||||
* 100k pullup. The hardware applies offset/slope to adc code.
|
||||
* SCALE_HW_CALIB_THERM_100K_PU_PM7: Returns temperature in millidegC using
|
||||
* lookup table for PMIC7. The hardware applies offset/slope to adc code.
|
||||
* SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade.
|
||||
* The hardware applies offset/slope to adc code.
|
||||
* SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade.
|
||||
* The hardware applies offset/slope to adc code. This is for PMIC7.
|
||||
* SCALE_HW_CALIB_PM5_CHG_TEMP: Returns result in millidegrees for PMIC5
|
||||
* charger temperature.
|
||||
* SCALE_HW_CALIB_PM5_SMB_TEMP: Returns result in millidegrees for PMIC5
|
||||
|
|
@ -127,7 +138,9 @@ enum vadc_scale_fn_type {
|
|||
SCALE_HW_CALIB_DEFAULT,
|
||||
SCALE_HW_CALIB_THERM_100K_PULLUP,
|
||||
SCALE_HW_CALIB_XOTHERM,
|
||||
SCALE_HW_CALIB_THERM_100K_PU_PM7,
|
||||
SCALE_HW_CALIB_PMIC_THERM,
|
||||
SCALE_HW_CALIB_PMIC_THERM_PM7,
|
||||
SCALE_HW_CALIB_PM5_CHG_TEMP,
|
||||
SCALE_HW_CALIB_PM5_SMB_TEMP,
|
||||
SCALE_HW_CALIB_INVALID,
|
||||
|
|
|
|||
67
include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
Normal file
67
include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
Normal file
|
|
@ -0,0 +1,67 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2019 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
|
||||
#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
|
||||
|
||||
#ifndef PM8350_SID
|
||||
#define PM8350_SID 1
|
||||
#endif
|
||||
|
||||
/* ADC channels for PM8350_ADC for PMIC7 */
|
||||
#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0)
|
||||
#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01)
|
||||
#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02)
|
||||
#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03)
|
||||
|
||||
#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04)
|
||||
#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05)
|
||||
#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06)
|
||||
#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07)
|
||||
#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08)
|
||||
#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a)
|
||||
#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b)
|
||||
#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c)
|
||||
#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d)
|
||||
|
||||
/* 30k pull-up1 */
|
||||
#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24)
|
||||
#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25)
|
||||
#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26)
|
||||
#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27)
|
||||
#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28)
|
||||
#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a)
|
||||
#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b)
|
||||
#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c)
|
||||
#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44)
|
||||
#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45)
|
||||
#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46)
|
||||
#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47)
|
||||
#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48)
|
||||
#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a)
|
||||
#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b)
|
||||
#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c)
|
||||
#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d)
|
||||
|
||||
/* 400k pull-up3 */
|
||||
#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64)
|
||||
#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65)
|
||||
#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66)
|
||||
#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67)
|
||||
#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68)
|
||||
#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a)
|
||||
#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b)
|
||||
#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c)
|
||||
#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d)
|
||||
|
||||
/* 1/3 Divider */
|
||||
#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d)
|
||||
|
||||
#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
|
||||
88
include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h
Normal file
88
include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h
Normal file
|
|
@ -0,0 +1,88 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2019 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H
|
||||
#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H
|
||||
|
||||
#ifndef PM8350B_SID
|
||||
#define PM8350B_SID 3
|
||||
#endif
|
||||
|
||||
/* ADC channels for PM8350B_ADC for PMIC7 */
|
||||
#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0)
|
||||
#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01)
|
||||
#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02)
|
||||
#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03)
|
||||
|
||||
#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04)
|
||||
#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05)
|
||||
#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06)
|
||||
#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07)
|
||||
#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08)
|
||||
#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09)
|
||||
#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a)
|
||||
#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b)
|
||||
#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c)
|
||||
#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d)
|
||||
|
||||
#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10)
|
||||
#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11)
|
||||
#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12)
|
||||
#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13)
|
||||
#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15)
|
||||
#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17)
|
||||
|
||||
/* 30k pull-up1 */
|
||||
#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24)
|
||||
#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25)
|
||||
#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26)
|
||||
#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27)
|
||||
#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28)
|
||||
#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29)
|
||||
#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a)
|
||||
#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b)
|
||||
#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c)
|
||||
#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d)
|
||||
#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44)
|
||||
#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45)
|
||||
#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46)
|
||||
#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47)
|
||||
#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48)
|
||||
#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49)
|
||||
#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a)
|
||||
#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b)
|
||||
#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c)
|
||||
#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d)
|
||||
#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53)
|
||||
|
||||
/* 400k pull-up3 */
|
||||
#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64)
|
||||
#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65)
|
||||
#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66)
|
||||
#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67)
|
||||
#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68)
|
||||
#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69)
|
||||
#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a)
|
||||
#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b)
|
||||
#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c)
|
||||
#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d)
|
||||
#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73)
|
||||
|
||||
/* 1/3 Divider */
|
||||
#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a)
|
||||
#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b)
|
||||
#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c)
|
||||
#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d)
|
||||
|
||||
#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e)
|
||||
#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f)
|
||||
|
||||
#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94)
|
||||
#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */
|
||||
46
include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h
Normal file
46
include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2019 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H
|
||||
#define _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H
|
||||
|
||||
#ifndef PMK8350_SID
|
||||
#define PMK8350_SID 0
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMK8350_ADC for PMIC7 */
|
||||
#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0)
|
||||
#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01)
|
||||
#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02)
|
||||
#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03)
|
||||
|
||||
#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04)
|
||||
#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05)
|
||||
#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06)
|
||||
#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07)
|
||||
#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08)
|
||||
|
||||
/* 30k pull-up1 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24)
|
||||
#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25)
|
||||
#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26)
|
||||
#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27)
|
||||
#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44)
|
||||
#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45)
|
||||
#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46)
|
||||
#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47)
|
||||
#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48)
|
||||
|
||||
/* 400k pull-up3 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64)
|
||||
#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65)
|
||||
#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66)
|
||||
#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67)
|
||||
#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */
|
||||
28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h
Normal file
28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2019 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H
|
||||
#define _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H
|
||||
|
||||
#ifndef PMR735A_SID
|
||||
#define PMR735A_SID 4
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMR735A_ADC for PMIC7 */
|
||||
#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0)
|
||||
#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01)
|
||||
#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02)
|
||||
#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03)
|
||||
|
||||
#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a)
|
||||
#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b)
|
||||
#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a)
|
||||
#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b)
|
||||
#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */
|
||||
28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h
Normal file
28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2019 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H
|
||||
#define _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H
|
||||
|
||||
#ifndef PMR735B_SID
|
||||
#define PMR735B_SID 5
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMR735B_ADC for PMIC7 */
|
||||
#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0)
|
||||
#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01)
|
||||
#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02)
|
||||
#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03)
|
||||
|
||||
#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a)
|
||||
#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b)
|
||||
#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a)
|
||||
#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b)
|
||||
#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (c) 2012-2014,2018 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2012-2014,2018-2019 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
|
||||
|
|
@ -221,4 +221,95 @@
|
|||
|
||||
#define ADC5_MAX_CHANNEL 0xc0
|
||||
|
||||
/* ADC channels for ADC for PMIC7 */
|
||||
|
||||
#define ADC7_REF_GND 0x00
|
||||
#define ADC7_1P25VREF 0x01
|
||||
#define ADC7_VREF_VADC 0x02
|
||||
#define ADC7_DIE_TEMP 0x03
|
||||
|
||||
#define ADC7_AMUX_THM1 0x04
|
||||
#define ADC7_AMUX_THM2 0x05
|
||||
#define ADC7_AMUX_THM3 0x06
|
||||
#define ADC7_AMUX_THM4 0x07
|
||||
#define ADC7_AMUX_THM5 0x08
|
||||
#define ADC7_AMUX_THM6 0x09
|
||||
#define ADC7_GPIO1 0x0a
|
||||
#define ADC7_GPIO2 0x0b
|
||||
#define ADC7_GPIO3 0x0c
|
||||
#define ADC7_GPIO4 0x0d
|
||||
|
||||
#define ADC7_CHG_TEMP 0x10
|
||||
#define ADC7_USB_IN_V_16 0x11
|
||||
#define ADC7_VDC_16 0x12
|
||||
#define ADC7_CC1_ID 0x13
|
||||
#define ADC7_VREF_BAT_THERM 0x15
|
||||
#define ADC7_IIN_FB 0x17
|
||||
|
||||
/* 30k pull-up1 */
|
||||
#define ADC7_AMUX_THM1_30K_PU 0x24
|
||||
#define ADC7_AMUX_THM2_30K_PU 0x25
|
||||
#define ADC7_AMUX_THM3_30K_PU 0x26
|
||||
#define ADC7_AMUX_THM4_30K_PU 0x27
|
||||
#define ADC7_AMUX_THM5_30K_PU 0x28
|
||||
#define ADC7_AMUX_THM6_30K_PU 0x29
|
||||
#define ADC7_GPIO1_30K_PU 0x2a
|
||||
#define ADC7_GPIO2_30K_PU 0x2b
|
||||
#define ADC7_GPIO3_30K_PU 0x2c
|
||||
#define ADC7_GPIO4_30K_PU 0x2d
|
||||
#define ADC7_CC1_ID_30K_PU 0x33
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define ADC7_AMUX_THM1_100K_PU 0x44
|
||||
#define ADC7_AMUX_THM2_100K_PU 0x45
|
||||
#define ADC7_AMUX_THM3_100K_PU 0x46
|
||||
#define ADC7_AMUX_THM4_100K_PU 0x47
|
||||
#define ADC7_AMUX_THM5_100K_PU 0x48
|
||||
#define ADC7_AMUX_THM6_100K_PU 0x49
|
||||
#define ADC7_GPIO1_100K_PU 0x4a
|
||||
#define ADC7_GPIO2_100K_PU 0x4b
|
||||
#define ADC7_GPIO3_100K_PU 0x4c
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#define ADC7_GPIO4_100K_PU 0x4d
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#define ADC7_CC1_ID_100K_PU 0x53
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/* 400k pull-up3 */
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#define ADC7_AMUX_THM1_400K_PU 0x64
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#define ADC7_AMUX_THM2_400K_PU 0x65
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#define ADC7_AMUX_THM3_400K_PU 0x66
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#define ADC7_AMUX_THM4_400K_PU 0x67
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#define ADC7_AMUX_THM5_400K_PU 0x68
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#define ADC7_AMUX_THM6_400K_PU 0x69
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#define ADC7_GPIO1_400K_PU 0x6a
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#define ADC7_GPIO2_400K_PU 0x6b
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#define ADC7_GPIO3_400K_PU 0x6c
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#define ADC7_GPIO4_400K_PU 0x6d
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#define ADC7_CC1_ID_400K_PU 0x73
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/* 1/3 Divider */
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#define ADC7_GPIO1_DIV3 0x8a
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#define ADC7_GPIO2_DIV3 0x8b
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#define ADC7_GPIO3_DIV3 0x8c
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#define ADC7_GPIO4_DIV3 0x8d
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#define ADC7_VPH_PWR 0x8e
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#define ADC7_VBAT_SNS 0x8f
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#define ADC7_SBUx 0x94
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#define ADC7_VBAT_2S_MID 0x96
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/* VADC scale function index */
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#define ADC_SCALE_DEFAULT 0
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#define ADC_SCALE_THERM_100K_PULLUP 1
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#define ADC_SCALE_PMIC_THERM 2
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#define ADC_SCALE_XOTHERM 3
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#define ADC_SCALE_PMI_CHG_TEMP 4
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#define ADC_SCALE_HW_CALIB_DEFAULT 5
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#define ADC_SCALE_HW_CALIB_THERM_100K_PULLUP 6
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#define ADC_SCALE_HW_CALIB_XOTHERM 7
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#define ADC_SCALE_HW_CALIB_THERM_100K_PU_PM7 8
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#define ADC_SCALE_HW_CALIB_PMIC_THERM 9
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#define ADC_SCALE_HW_CALIB_PMIC_THERM_PM7 10
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#define ADC_SCALE_HW_CALIB_PM5_CHG_TEMP 11
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#define ADC_SCALE_HW_CALIB_PM5_SMB_TEMP 12
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */
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|
|
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Loading…
Reference in a new issue