fw-api: CL 28481760 - update fw common interface files

Change-Id: I51bc0a64b92bdce8fd14b9df8f7012dc487d8fd4
CRs-Fixed: 3830439
This commit is contained in:
spuligil 2025-01-25 06:01:35 -08:00 • committed by Ravindra Konda
commit f0a7890d5a

155
fw/htt.h
View file

@ -265,9 +265,10 @@
* 3.135 Add HTT_HOST4_TO_FW_RXBUF_RING def.
* 3.136 Add htt_ext_present flag in htt_tx_tcl_global_seq_metadata.
* 3.137 Add more HTT_SDWF_MSDUQ_CFG_IND_ERROR codes.
* 3.138 Add T2H MLO_LATENCY_REQ, H2T _RESP msg defs.
*/
#define HTT_CURRENT_VERSION_MAJOR 3
#define HTT_CURRENT_VERSION_MINOR 137
#define HTT_CURRENT_VERSION_MINOR 138
#define HTT_NUM_TX_FRAG_DESC 1024
@ -913,6 +914,7 @@ enum htt_h2t_msg_type {
HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG = 0x25,
HTT_H2T_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP = 0x26,
HTT_H2T_MSG_TYPE_SDWF_MSDUQ_RECFG_REQ = 0x27,
HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_RESP = 0x28,
/* keep this last */
HTT_H2T_NUM_MSGS
@ -11495,6 +11497,89 @@ PREPACK struct htt_h2t_sdwf_msduq_recfg_req {
((_var) |= ((_val) << HTT_H2T_SDWF_MSDUQ_RECFG_REQUEST_COOKIE_S)); \
} while (0)
/**
* @brief host -> target report MLO latency stats to FW periodically
*
* MSG_TYPE => HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_RESP
*
* @details
*
* |31 24|23 16|15 8|7 0|
* |----------------+----------------+----------------+----------------|
* | avg latency ms | vdev id | msg type |
* |----------------+----------------+----------------+----------------|
* | num of tx MSDUs | avg latency jitter ms |
* |-------------------------------------------------------------------|
*
* @details
* struct htt_h2t_mlo_latency_stats:
*
* The message is interpreted as follows:
* dword0 - b'7:0 - msg_type: Identifies mlo latency stats to fw
* This will be set to 0x28
* (HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_RESP)
* b'15:8 - vdev id : Indicate which vdev in the pdev is chosen
* as primary
* b'31:16 - avg latency ms: Indicate average MLO latency in a period
* dword1 - b'15:0 - min jitter ms: Indicate avg jitter of MLO latency in a
* period
* b'31:16 - num of tx packet : Indicate how many MSDUs are sent in a
* period
*/
/* HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_RESP */
PREPACK struct htt_h2t_mlo_latency_stats {
A_UINT32 msg_type: 8, /* bits 7:0 */
vdev_id: 8, /* bits 15:8 */
avg_latency_ms: 16; /* bits 31:16 */
A_UINT32 avg_jitter_ms: 16, /* bits 15:0 */
num_of_tx_pkt: 16; /* bits 31:16 */
} POSTPACK;
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_M 0x0000FF00
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_S 8
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_GET(_var) \
(((_var) & HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_M) >> \
HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_S)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID, _val); \
((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_VDEV_ID_S)); \
} while (0)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_M 0xFFFF0000
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_S 16
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_GET(_var) \
(((_var) & HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_M) >> \
HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_S)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS, _val); \
((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_LATENCY_MS_S)); \
} while (0)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_M 0x0000FFFF
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_S 0
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_GET(_var) \
(((_var) & HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_M) >> \
HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_S)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS, _val); \
((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_AVG_JITTER_MS_S)); \
} while (0)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_M 0xFFFF0000
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_S 16
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_GET(_var) \
(((_var) & HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_M) >> \
HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_S)
#define HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT, _val); \
((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_S)); \
} while (0)
/*=== target -> host messages ===============================================*/
@ -11569,6 +11654,7 @@ enum htt_t2h_msg_type {
HTT_T2H_MSG_TYPE_TX_LATENCY_STATS_PERIODIC_IND = 0x3a,
HTT_T2H_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP_DONE = 0x3b,
HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND = 0x3c,
HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ = 0x3d,
HTT_T2H_MSG_TYPE_TEST,
@ -23290,6 +23376,73 @@ PREPACK struct htt_t2h_sdwf_msduq_cfg_ind {
((_var) |= ((_val) << HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_REQUEST_COOKIE_S)); \
} while (0)
/**
* @brief target -> host request for MLO latency stats
*
* MSG_TYPE => HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ
*
* @details
*
* |31 24|23 16| 15 |14 8|7 0|
* |----------------+----------------+------+---------+----------------|
* | periodic interval |enable| vdev id | msg type |
* |-------------------------------------------------------------------|
*
* @details
* struct htt_t2h_mlo_latency_req_t:
*
* The message is interpreted as follows:
* dword0 - b'7:0 - msg_type: Identifies a request for MLO latency stats
* This will be set to 0x3d
* (HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ)
* b'14:8 - vdev id : Indicate which vdev in the pdev is chosen
* as primary
* b'15 - enable: Indicate if request of MLO latency stats is
* enabled
* b'31:16 - periodic interval: Indicate the interval in ms of
* reporting MLO latency stats
*/
/* HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ */
PREPACK struct htt_t2h_mlo_latency_req_t {
A_UINT32 msg_type: 8, /* bits 7:0 */
vdev_id: 7, /* bits 14:8 */
enable: 1, /* bits 15 */
periodic_intvl: 16; /* bits 31:16 */
} POSTPACK;
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_M 0x00007F00
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_S 8
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_GET(_var) \
(((_var) & HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_M) >> \
HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_S)
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID, _val); \
((_var) |= ((_val) << HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_VDEV_ID_S)); \
} while (0)
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_M 0x00008000
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_S 15
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_GET(_var) \
(((_var) & HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_M) >> \
HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_S)
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE, _val); \
((_var) |= ((_val) << HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_ENABLE_S)); \
} while (0)
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_M 0xFFFF0000
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_S 16
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_GET(_var) \
(((_var) & HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_M) >> \
HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_S)
#define HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL, _val); \
((_var) |= ((_val) << HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ_PERIODIC_INTVL_S)); \
} while (0)
#endif