From f0af1d284f880ae5a795be26c273bcd8da3542c4 Mon Sep 17 00:00:00 2001
From: houdz1 <houdz1@lenovo.com>
Date: Wed, 11 Aug 2021 10:20:07 +0800
Subject: [PATCH] arm64/dts: cypfq/csot_panel: add code to change bit width of
 backlight

In order to be consistent with the first panel(tianma),
we change the bit width of csot_panel's backlight to 10bits.
From DVT2, these code will be otp,So we can not send the init code to change bit width.

Change-Id: I852d64671ddcf8040bdd5e7e8f1b528f23e47066
Signed-off-by: houdz1 <houdz1@lenovo.com>
Reviewed-on: https://gerrit.mot.com/2038441
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Yeqing Wang <wangyq13@motorola.com>
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
---
 qcom/holi-cypfq-dvt1-overlay.dts | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/qcom/holi-cypfq-dvt1-overlay.dts b/qcom/holi-cypfq-dvt1-overlay.dts
index a3a04f189bf0..e2ac6906e930 100644
--- a/qcom/holi-cypfq-dvt1-overlay.dts
+++ b/qcom/holi-cypfq-dvt1-overlay.dts
@@ -22,3 +22,28 @@
 	qcom,board-id = <0x47 0xB100>;
 };
 
+
+&dsi_csot_gc7372_678_fhd_video {
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,mdss-dsi-on-command =
+			[
+					39 01 00 00 00 00 04 FF 55 AA 66
+					15 01 00 00 00 00 02 FF 23
+					15 01 00 00 00 00 02 FB 00
+					15 01 00 00 00 00 02 2E 2B
+					15 01 00 00 00 00 02 32 01
+					15 01 00 00 00 00 02 FF 10
+					15 01 00 00 00 00 02 FB 00
+					15 01 00 00 00 00 02 36 08
+					15 01 00 00 00 00 02 BA 03
+					15 01 00 00 00 00 02 69 00
+					15 01 00 00 00 00 02 35 00
+					15 01 00 00 00 00 02 53 2C
+					15 01 00 00 00 00 02 55 01
+					05 01 00 00 96 00 01 11
+					05 01 00 00 32 00 01 29
+			];
+		};
+	};
+};