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gpio: Move irqdomain into struct gpio_irq_chip

Browse source 
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.

Signed-off-by: Thierry Reding <[email protected]>
Acked-by: Grygorii Strashko <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
This commit is contained in:
Thierry Reding 2017-11-07 19:15:47 +01:00 • committed by Linus Walleij
commit f0fbe7bce7
56 changed files with 78 additions and 71 deletions
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2
drivers/gpio/gpio-104-dio-48e.c
View file

@ -326,7 +326,7 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
unsigned long gpio;
for_each_set_bit(gpio, &irq_mask, 2)
generic_handle_irq(irq_find_mapping(chip->irqdomain,
generic_handle_irq(irq_find_mapping(chip->irq.domain,
19 + gpio*24));
raw_spin_lock(&dio48egpio->lock);

2
drivers/gpio/gpio-104-idi-48.c
View file

@ -209,7 +209,7 @@ static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
for_each_set_bit(bit_num, &irq_mask, 8) {
gpio = bit_num + boundary * 8;
generic_handle_irq(irq_find_mapping(chip->irqdomain,
generic_handle_irq(irq_find_mapping(chip->irq.domain,
gpio));
}
}

2
drivers/gpio/gpio-104-idio-16.c
View file

@ -199,7 +199,7 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
int gpio;
for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio));
generic_handle_irq(irq_find_mapping(chip->irq.domain, gpio));
raw_spin_lock(&idio16gpio->lock);

2
drivers/gpio/gpio-adnp.c
View file

@ -320,7 +320,7 @@ static irqreturn_t adnp_irq(int irq, void *data)
for_each_set_bit(bit, &pending, 8) {
unsigned int child_irq;
child_irq = irq_find_mapping(adnp->gpio.irqdomain,
child_irq = irq_find_mapping(adnp->gpio.irq.domain,
base + bit);
handle_nested_irq(child_irq);
}

4
drivers/gpio/gpio-altera.c
View file

@ -211,7 +211,7 @@ static void altera_gpio_irq_edge_handler(struct irq_desc *desc)
altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));
chip = irq_desc_get_chip(desc);
mm_gc = &altera_gc->mmchip;
irqdomain = altera_gc->mmchip.gc.irqdomain;
irqdomain = altera_gc->mmchip.gc.irq.domain;
chained_irq_enter(chip, desc);
@ -239,7 +239,7 @@ static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)
altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));
chip = irq_desc_get_chip(desc);
mm_gc = &altera_gc->mmchip;
irqdomain = altera_gc->mmchip.gc.irqdomain;
irqdomain = altera_gc->mmchip.gc.irq.domain;
chained_irq_enter(chip, desc);

2
drivers/gpio/gpio-aspeed.c
View file

@ -469,7 +469,7 @@ static void aspeed_gpio_irq_handler(struct irq_desc *desc)
reg = ioread32(bank_irq_reg(data, bank, GPIO_IRQ_STATUS));
for_each_set_bit(p, &reg, 32) {
girq = irq_find_mapping(gc->irqdomain, i * 32 + p);
girq = irq_find_mapping(gc->irq.domain, i * 32 + p);
generic_handle_irq(girq);
}

2
drivers/gpio/gpio-ath79.c
View file

@ -209,7 +209,7 @@ static void ath79_gpio_irq_handler(struct irq_desc *desc)
if (pending) {
for_each_set_bit(irq, &pending, gc->ngpio)
generic_handle_irq(
irq_linear_revmap(gc->irqdomain, irq));
irq_linear_revmap(gc->irq.domain, irq));
}
chained_irq_exit(irqchip, desc);

2
drivers/gpio/gpio-crystalcove.c
View file

@ -295,7 +295,7 @@ static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)
for (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {
if (pending & BIT(gpio)) {
virq = irq_find_mapping(cg->chip.irqdomain, gpio);
virq = irq_find_mapping(cg->chip.irq.domain, gpio);
handle_nested_irq(virq);
}
}

2
drivers/gpio/gpio-dln2.c
View file

@ -420,7 +420,7 @@ static void dln2_gpio_event(struct platform_device *pdev, u16 echo,
return;
}
irq = irq_find_mapping(dln2->gpio.irqdomain, pin);
irq = irq_find_mapping(dln2->gpio.irq.domain, pin);
if (!irq) {
dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);
return;

2
drivers/gpio/gpio-ftgpio010.c
View file

@ -149,7 +149,7 @@ static void ftgpio_gpio_irq_handler(struct irq_desc *desc)
stat = readl(g->base + GPIO_INT_STAT);
if (stat)
for_each_set_bit(offset, &stat, gc->ngpio)
generic_handle_irq(irq_find_mapping(gc->irqdomain,
generic_handle_irq(irq_find_mapping(gc->irq.domain,
offset));
chained_irq_exit(irqchip, desc);

2
drivers/gpio/gpio-ingenic.c
View file

@ -242,7 +242,7 @@ static void ingenic_gpio_irq_handler(struct irq_desc *desc)
flag = gpio_ingenic_read_reg(jzgc, JZ4740_GPIO_FLAG);
for_each_set_bit(i, &flag, 32)
generic_handle_irq(irq_linear_revmap(gc->irqdomain, i));
generic_handle_irq(irq_linear_revmap(gc->irq.domain, i));
chained_irq_exit(irq_chip, desc);
}

2
drivers/gpio/gpio-intel-mid.c
View file

@ -295,7 +295,7 @@ static void intel_mid_irq_handler(struct irq_desc *desc)
mask = BIT(gpio);
/* Clear before handling so we can't lose an edge */
writel(mask, gedr);
generic_handle_irq(irq_find_mapping(gc->irqdomain,
generic_handle_irq(irq_find_mapping(gc->irq.domain,
base + gpio));
}
}

2
drivers/gpio/gpio-lynxpoint.c
View file

@ -255,7 +255,7 @@ static void lp_gpio_irq_handler(struct irq_desc *desc)
mask = BIT(pin);
/* Clear before handling so we don't lose an edge */
outl(mask, reg);
irq = irq_find_mapping(lg->chip.irqdomain, base + pin);
irq = irq_find_mapping(lg->chip.irq.domain, base + pin);
generic_handle_irq(irq);
}
}

2
drivers/gpio/gpio-max732x.c
View file

@ -486,7 +486,7 @@ static irqreturn_t max732x_irq_handler(int irq, void *devid)
do {
level = __ffs(pending);
handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
level));
pending &= ~(1 << level);

2
drivers/gpio/gpio-merrifield.c
View file

@ -357,7 +357,7 @@ static void mrfld_irq_handler(struct irq_desc *desc)
for_each_set_bit(gpio, &pending, 32) {
unsigned int irq;
irq = irq_find_mapping(gc->irqdomain, base + gpio);
irq = irq_find_mapping(gc->irq.domain, base + gpio);
generic_handle_irq(irq);
}
}

2
drivers/gpio/gpio-omap.c
View file

@ -733,7 +733,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)
raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags);
generic_handle_irq(irq_find_mapping(bank->chip.irqdomain,
generic_handle_irq(irq_find_mapping(bank->chip.irq.domain,
bit));
raw_spin_unlock_irqrestore(&bank->wa_lock,

2
drivers/gpio/gpio-pca953x.c
View file

@ -608,7 +608,7 @@ static irqreturn_t pca953x_irq_handler(int irq, void *devid)
for (i = 0; i < NBANK(chip); i++) {
while (pending[i]) {
level = __ffs(pending[i]);
handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
level + (BANK_SZ * i)));
pending[i] &= ~(1 << level);
nhandled++;

2
drivers/gpio/gpio-pcf857x.c
View file

@ -196,7 +196,7 @@ static irqreturn_t pcf857x_irq(int irq, void *data)
mutex_unlock(&gpio->lock);
for_each_set_bit(i, &change, gpio->chip.ngpio)
handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i));
handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
return IRQ_HANDLED;
}

2
drivers/gpio/gpio-pci-idio-16.c
View file

@ -240,7 +240,7 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
return IRQ_NONE;
for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio));
generic_handle_irq(irq_find_mapping(chip->irq.domain, gpio));
raw_spin_lock(&idio16gpio->lock);

2
drivers/gpio/gpio-pl061.c
View file

@ -221,7 +221,7 @@ static void pl061_irq_handler(struct irq_desc *desc)
pending = readb(pl061->base + GPIOMIS);
if (pending) {
for_each_set_bit(offset, &pending, PL061_GPIO_NR)
generic_handle_irq(irq_find_mapping(gc->irqdomain,
generic_handle_irq(irq_find_mapping(gc->irq.domain,
offset));
}

2
drivers/gpio/gpio-rcar.c
View file

@ -207,7 +207,7 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
gpio_rcar_read(p, INTMSK))) {
offset = __ffs(pending);
gpio_rcar_write(p, INTCLR, BIT(offset));
generic_handle_irq(irq_find_mapping(p->gpio_chip.irqdomain,
generic_handle_irq(irq_find_mapping(p->gpio_chip.irq.domain,
offset));
irqs_handled++;
}

4
drivers/gpio/gpio-reg.c
View file

@ -103,8 +103,8 @@ static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset)
struct gpio_reg *r = to_gpio_reg(gc);
int irq = r->irqs[offset];
if (irq >= 0 && r->irqdomain)
irq = irq_find_mapping(r->irqdomain, irq);
if (irq >= 0 && r->irq.domain)
irq = irq_find_mapping(r->irq.domain, irq);
return irq;
}

2
drivers/gpio/gpio-stmpe.c
View file

@ -397,7 +397,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
while (stat) {
int bit = __ffs(stat);
int line = bank * 8 + bit;
int child_irq = irq_find_mapping(stmpe_gpio->chip.irqdomain,
int child_irq = irq_find_mapping(stmpe_gpio->chip.irq.domain,
line);
handle_nested_irq(child_irq);

2
drivers/gpio/gpio-tc3589x.c
View file

@ -268,7 +268,7 @@ static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
while (stat) {
int bit = __ffs(stat);
int line = i * 8 + bit;
int irq = irq_find_mapping(tc3589x_gpio->chip.irqdomain,
int irq = irq_find_mapping(tc3589x_gpio->chip.irq.domain,
line);
handle_nested_irq(irq);

2
drivers/gpio/gpio-vf610.c
View file

@ -160,7 +160,7 @@ static void vf610_gpio_irq_handler(struct irq_desc *desc)
for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
generic_handle_irq(irq_find_mapping(port->gc.irq.domain, pin));
}
chained_irq_exit(chip, desc);

2
drivers/gpio/gpio-wcove.c
View file

@ -350,7 +350,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
BIT(gpio);
virq = irq_find_mapping(wg->chip.irqdomain, gpio);
virq = irq_find_mapping(wg->chip.irq.domain, gpio);
handle_nested_irq(virq);
regmap_update_bits(wg->regmap, IRQ_STATUS_BASE + offset,
mask, mask);

2
drivers/gpio/gpio-ws16c48.c
View file

@ -332,7 +332,7 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)
int_id = inb(ws16c48gpio->base + 8 + port);
for_each_set_bit(gpio, &int_id, 8)
generic_handle_irq(irq_find_mapping(
chip->irqdomain, gpio + 8*port));
chip->irq.domain, gpio + 8*port));
}
int_pending = inb(ws16c48gpio->base + 6) & 0x7;

2
drivers/gpio/gpio-xgene-sb.c
View file

@ -287,7 +287,7 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)
if (!priv->irq_domain)
return -ENODEV;
priv->gc.irqdomain = priv->irq_domain;
priv->gc.irq.domain = priv->irq_domain;
ret = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
if (ret) {

2
drivers/gpio/gpio-xlp.c
View file

@ -225,7 +225,7 @@ static void xlp_gpio_generic_handler(struct irq_desc *desc)
if (gpio_stat & BIT(gpio % XLP_GPIO_REGSZ))
generic_handle_irq(irq_find_mapping(
priv->chip.irqdomain, gpio));
priv->chip.irq.domain, gpio));
}
chained_irq_exit(irqchip, desc);
}

2
drivers/gpio/gpio-zx.c
View file

@ -170,7 +170,7 @@ static void zx_irq_handler(struct irq_desc *desc)
writew_relaxed(pending, chip->base + ZX_GPIO_IC);
if (pending) {
for_each_set_bit(offset, &pending, ZX_GPIO_NR)
generic_handle_irq(irq_find_mapping(gc->irqdomain,
generic_handle_irq(irq_find_mapping(gc->irq.domain,
offset));
}

2
drivers/gpio/gpio-zynq.c
View file

@ -562,7 +562,7 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
unsigned long pending)
{
unsigned int bank_offset = gpio->p_data->bank_min[bank_num];
struct irq_domain *irqdomain = gpio->chip.irqdomain;
struct irq_domain *irqdomain = gpio->chip.irq.domain;
int offset;
if (!pending)

22
drivers/gpio/gpiolib.c
View file

@ -1550,7 +1550,7 @@ static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip,
{
unsigned int offset;
if (!gpiochip->irqdomain) {
if (!gpiochip->irq.domain) {
chip_err(gpiochip, "called %s before setting up irqchip\n",
__func__);
return;
@ -1577,7 +1577,7 @@ static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip,
for (offset = 0; offset < gpiochip->ngpio; offset++) {
if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
continue;
irq_set_parent(irq_find_mapping(gpiochip->irqdomain, offset),
irq_set_parent(irq_find_mapping(gpiochip->irq.domain, offset),
parent_irq);
}
}
@ -1708,7 +1708,7 @@ static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
{
if (!gpiochip_irqchip_irq_valid(chip, offset))
return -ENXIO;
return irq_create_mapping(chip->irqdomain, offset);
return irq_create_mapping(chip->irq.domain, offset);
}
/**
@ -1719,7 +1719,7 @@ static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
*/
static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
{
unsigned int offset;
unsigned int offset, irq;
acpi_gpiochip_free_interrupts(gpiochip);
@ -1729,14 +1729,16 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
}
/* Remove all IRQ mappings and delete the domain */
if (gpiochip->irqdomain) {
if (gpiochip->irq.domain) {
for (offset = 0; offset < gpiochip->ngpio; offset++) {
if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
continue;
irq_dispose_mapping(
irq_find_mapping(gpiochip->irqdomain, offset));
irq = irq_find_mapping(gpiochip->irq.domain, offset);
irq_dispose_mapping(irq);
}
irq_domain_remove(gpiochip->irqdomain);
irq_domain_remove(gpiochip->irq.domain);
}
if (gpiochip->irq.chip) {
@ -1822,10 +1824,10 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
gpiochip->irq_default_type = type;
gpiochip->to_irq = gpiochip_to_irq;
gpiochip->lock_key = lock_key;
gpiochip->irqdomain = irq_domain_add_simple(of_node,
gpiochip->irq.domain = irq_domain_add_simple(of_node,
gpiochip->ngpio, first_irq,
&gpiochip_domain_ops, gpiochip);
if (!gpiochip->irqdomain) {
if (!gpiochip->irq.domain) {
gpiochip->irq.chip = NULL;
return -EINVAL;
}