diff --git a/display/yupik-sde.dtsi b/display/yupik-sde.dtsi
index ab62f8bc5bab..3eb918fd9300 100644
--- a/display/yupik-sde.dtsi
+++ b/display/yupik-sde.dtsi
@@ -46,14 +46,14 @@
 		interrupts = <12 0>;
 
 		#clock-cells = <1>;
-		clocks =  <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>,
-			<&clock_rpmh RPMH_CXO_CLK>,
-			<&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
-			<&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>,
-			<&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
-			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+		clocks =  <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
+			<&rpmhcc RPMH_CXO_CLK>,
+			<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
+			<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
+			<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
+			<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
 			<&sde_dp DP_PHY_PLL_VCO_DIV_CLK>,
-			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+			<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
 		clock-names = "core_aux_clk", "core_usb_ref_clk_src",
 			"core_usb_pipe_clk", "link_clk", "link_iface_clk",
 			"pixel_clk_rcg", "pixel_parent","strm0_pixel_clk";
@@ -74,7 +74,6 @@
 
 		vdda-1p2-supply = <&L6B>;
 		vdda-0p9-supply = <&L1B>;
-		vdd_mx-supply = <&VDD_MXA_LEVEL>;
 
 		qcom,ctrl-supply-entries {
 			#address-cells = <1>;