From f26c6f88af8a34337edd8d75449077ae148e5c70 Mon Sep 17 00:00:00 2001
From: houdz1 <houdz1@lenovo.com>
Date: Wed, 13 Jan 2021 16:52:21 +0800
Subject: [PATCH] denver/display:  decreasing manner of strength drive offset
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The clock and data lanes have a calibration circuitry feature. To offset the drive
strength from the calibrated value in an increasing or decreasing manner, use 6 bit
two’s complement values.

LCD desense has 1.2-1.5dB improve

Change-Id: I2c096604941f79b3ec31aa69afc5e1481652f03b
Signed-off-by: houdz1 <houdz1@lenovo.com>
Reviewed-on: https://gerrit.mot.com/1850390
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Yeqing Wang <wangyq13@motorola.com>
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
---
 qcom/denver-display.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/qcom/denver-display.dtsi b/qcom/denver-display.dtsi
index 821a07fa4a4d..f1fd4510fc86 100644
--- a/qcom/denver-display.dtsi
+++ b/qcom/denver-display.dtsi
@@ -37,6 +37,14 @@
 	qcom,dsi-default-panel = <&dsi_nt36675_auo_video>;
 };
 
+&mdss_dsi_phy0 {
+	qcom,platform-strength-ctrl = [55 03 30 30
+				55 03 30 30
+				55 03 30 30
+				55 03 30 30
+				55 00 30 30];
+};
+
 &soc {
 	dsi_panel_pwr_supply_denver: dsi_panel_pwr_supply_denver{
 		#address-cells = <1>;