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msm: mhi: Queue pending_ring WQ post channel DB check

Browse source 
Change is to queue pending_ring post updating CH db_pend
variable. This is done to avoid chdb_ctrl_work WQ from getting
pre-empted and pending_ring WQ executing.

Change-Id: I3504c89006c1231251be6efdfebac52b0fd35cc9
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
Signed-off-by: Gauri Joshi <gaurjosh@codeaurora.org>
This commit is contained in:
Subramanian Ananthanarayanan 2021-01-28 20:01:19 +05:30 • committed by Gauri Joshi
commit f2a589c5b1
1 changed files with 23 additions and 8 deletions
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31
drivers/platform/msm/mhi_dev/mhi.c
View file

@ -2260,20 +2260,29 @@ static void mhi_dev_queue_channel_db(struct mhi_dev *mhi,
pr_err("Error disabling chdb\n");
return;
}
queue_work(mhi->pending_ring_wq, &mhi->pending_work);
}
}
}
static void mhi_dev_check_channel_interrupt(struct mhi_dev *mhi)
/*
* mhi_dev_check_channel_interrupt () - function called
* to check if CH DB interrupts are present to process.
*
* Return : true if valid interrupts are present
* to process, false if not.
*/
static bool mhi_dev_check_channel_interrupt(struct mhi_dev *mhi)
{
int i, rc = 0;
bool pending_work = false;
uint32_t chintr_value = 0, ch_num = 0;
rc = mhi_dev_mmio_read_chdb_status_interrupts(mhi);
if (rc) {
pr_err("Read channel db\n");
return;
mhi_log(MHI_MSG_ERROR,
"Error while reading CH DB\n");
return pending_work;
}
for (i = 0; i < MHI_MASK_ROWS_CH_EV_DB; i++) {
@ -2281,6 +2290,7 @@ static void mhi_dev_check_channel_interrupt(struct mhi_dev *mhi)
/* Process channel status whose mask is enabled */
chintr_value = (mhi->chdb[i].status & mhi->chdb[i].mask);
if (chintr_value) {
pending_work = true;
mhi_log(MHI_MSG_VERBOSE,
"processing id: %d, ch interrupt 0x%x\n",
i, chintr_value);
@ -2288,11 +2298,13 @@ static void mhi_dev_check_channel_interrupt(struct mhi_dev *mhi)
rc = mhi_dev_mmio_write(mhi, MHI_CHDB_INT_CLEAR_A7_n(i),
mhi->chdb[i].status);
if (rc) {
pr_err("Error writing interrupt clear for A7\n");
return;
mhi_log(MHI_MSG_ERROR,
"Error writing interrupt clear for A7\n");
return pending_work;
}
}
}
return pending_work;
}
static void mhi_update_state_info_all(enum mhi_ctrl_info info)
@ -2458,6 +2470,7 @@ static void mhi_dev_scheduler(struct work_struct *work)
struct mhi_dev *mhi = container_of(work,
struct mhi_dev, chdb_ctrl_work);
int rc = 0;
bool work_pending = false;
uint32_t int_value = 0;
struct mhi_dev_ring *ring;
enum mhi_dev_state state;
@ -2511,11 +2524,13 @@ static void mhi_dev_scheduler(struct work_struct *work)
"processing cmd db interrupt with %d\n", int_value);
ring = &mhi->ring[MHI_RING_CMD_ID];
ring->state = RING_STATE_PENDING;
queue_work(mhi->pending_ring_wq, &mhi->pending_work);
work_pending = true;
}
/* get the specific channel interrupts */
mhi_dev_check_channel_interrupt(mhi);
work_pending |= mhi_dev_check_channel_interrupt(mhi);
if (work_pending)
queue_work(mhi->pending_ring_wq, &mhi->pending_work);
fail:
mutex_unlock(&mhi_ctx->mhi_lock);