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modules: The whole charging process will go twice CV

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After the thermal temperature reaches 39 ℃, the battery voltage will be limited to 4.1V,

and the whole charging process will go twice CV, resulting in excessive charging time

Change-Id: I33a36eb1329a3cb207bb8a20349a4045520142d1
Signed-off-by: wutao <huaqin89@motorola.com>
Reviewed-on: https://gerrit.mot.com/2201513
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Wei Xu <xuwei9@lenovo.com>
Reviewed-by: Wang Wang <wangwang1@lenovo.com>
Submit-Approved: gaoyx9 <gaoyx9@motorola.com>
This commit is contained in:
wutao 2022-02-25 17:28:13 +08:00 • committed by huaqin89
commit f2c06bfe3b
1 changed files with 23 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

30
drivers/power/mmi_discrete_turbo_charger/mmi_qc3p_cp_policy.c
View file

@ -225,6 +225,7 @@ void mmi_qc3p_chrg_enable_all_cp(struct mmi_charger_manager *chip, int val)
#define QC3P_HEARTBEAT_SHORT_DELAY_MS 1000
#define QC3P_HEARTBEAT_lOOP_WAIT_MS 3000
#define QC3P_HEARTBEAT_TUNNING_MS 100
#define QC3P_HEARTBEAT_SHORT_DELAY_MS 1000
#define QC3P_HEARTBEAT_NEXT_STATE_MS 100
#define QC3P_HEARTBEAT_CANCEL -1
#define QC3P_CC_CURR_DEBOUNCE 100000
@ -236,6 +237,7 @@ void mmi_qc3p_chrg_enable_all_cp(struct mmi_charger_manager *chip, int val)
#define QC3P_DISABLE_CHRG_LIMIT -1
#define QC3P_CP_CHRG_SOC_LIMIT 90
#define QC3P_CONT_PWR_CNT 5
#define CP_CV_VOLT_TOLERANCE 40000 //40mV
void qc3p_clear_chg_manager(struct mmi_charger_manager *chip)
{
@ -292,6 +294,7 @@ void mmi_qc3p_chrg_sm_work_func(struct work_struct *work)
struct mmi_chrg_step_info *chrg_step;
union power_supply_propval prop = {0,};
struct mmi_cp_policy_dev *chrg_list = &g_chrg_list;
int thermal_cooling_current = 0;
mmi_chrg_dbg(chip, PR_MOTO, "\n\n\n");
@ -793,7 +796,7 @@ void mmi_qc3p_chrg_sm_work_func(struct work_struct *work)
goto schedule;
}
if (vbatt_volt >= chrg_step->chrg_step_cv_volt
if (vbatt_volt >= (chrg_step->chrg_step_cv_volt - CP_CV_VOLT_TOLERANCE)
&& ((!chrg_step->last_step &&
ibatt_curr < chrg_step->chrg_step_cv_tapper_curr)
|| ibatt_curr < chrg_list->chrg_dev[CP_MASTER]->charging_curr_min)) {
@ -1008,17 +1011,18 @@ schedule:
chip->qc3p_sys_therm_volt = chip->qc3p_request_volt_prev;
}
thermal_cooling_current = min(chip->thermal_mitigation[chip->system_thermal_level],chrg_step->chrg_step_cc_curr);
if (ibatt_curr >
chip->thermal_mitigation[chip->system_thermal_level] + QC3P_CC_CURR_DEBOUNCE) {
if (ibatt_curr - chip->thermal_mitigation[chip->system_thermal_level] > 300000)
thermal_cooling_current + QC3P_CC_CURR_DEBOUNCE) {
if (ibatt_curr - thermal_cooling_current > 300000)
chip->qc3p_sys_therm_volt -= chip->qc3p_volt_steps *3;
else
chip->qc3p_sys_therm_volt -= chip->qc3p_volt_steps;
mmi_chrg_dbg(chip, PR_MOTO, "For thermal, decrease qc3 volt %d\n",
chip->qc3p_sys_therm_volt);
} else if ((ibatt_curr <
chip->thermal_mitigation[chip->system_thermal_level])) {
if (chip->thermal_mitigation[chip->system_thermal_level] - ibatt_curr > 300000)
thermal_cooling_current)) {
if (thermal_cooling_current - ibatt_curr > 300000)
chip->qc3p_sys_therm_volt += chip->qc3p_volt_steps *3;
else
chip->qc3p_sys_therm_volt += chip->qc3p_volt_steps;
@ -1036,8 +1040,20 @@ schedule:
mmi_chrg_qc3p_sm_move_state(chip, PM_QC3P_STATE_ENTRY);
}
if (chip->qc3p_sys_therm_cooling)
chip->qc3p_target_volt = min(chip->qc3p_target_volt, chip->qc3p_sys_therm_volt);
if (chip->qc3p_sys_therm_cooling){
mmi_chrg_dbg(chip, PR_MOTO, "at thermal cooling status ,judge ibatt_curr:%d, thermal_current_limited:%d ,chrg_step_cc_curr:%d,thermal_cooling_curr:%d\n",
ibatt_curr, chip->thermal_mitigation[chip->system_thermal_level],chrg_step->chrg_step_cc_curr,thermal_cooling_current);
mmi_chrg_dbg(chip, PR_MOTO, "at thermal cooling status ,qc3p_target_volt:%d, qc3p_sys_therm_volt:%d\n", chip->qc3p_target_volt, chip->qc3p_sys_therm_volt);
if(qc3p_sm_state == PM_QC3P_STATE_CP_CC_LOOP )
chip->qc3p_target_volt = chip->qc3p_sys_therm_volt ;
else
chip->qc3p_target_volt = min(chip->qc3p_target_volt, chip->qc3p_sys_therm_volt);
chip->qc3p_request_volt = chip->qc3p_target_volt;
chip->qc3p_sys_therm_volt = chip->qc3p_target_volt;
heartbeat_dely_ms = QC3P_HEARTBEAT_SHORT_DELAY_MS;
}
if (chip->qc3p_batt_therm_cooling && !chip->qc3p_sys_therm_force_pmic_chrg) {
if (batt_temp > chrg_step->temp_c + COOLING_HYSTERISIS_DEGC) {