diff --git a/bindings/arm/coresight.txt b/bindings/arm/coresight.txt
index 9991ffa3e0d9..a4d29ec88108 100644
--- a/bindings/arm/coresight.txt
+++ b/bindings/arm/coresight.txt
@@ -151,6 +151,9 @@ its hardware characteristcs.
 	* cti-flush-trig-num: Specifies the flush CTI trigger number for TMC
 	  ETR and TMC ETF.
 
+	* qcom,qdss-ipa-support : indicates whether qdss to ipa bam connection
+	   need to support.
+
 * Optional property for CATU and APSS :
 	* interrupts : Exactly one SPI may be listed for reporting the address
 	  error for CATU and four interrupts for TGU to get trigger from four
diff --git a/qcom/sdxlemur-coresight.dtsi b/qcom/sdxlemur-coresight.dtsi
index 2455c9fccd20..1a969e3b4942 100644
--- a/qcom/sdxlemur-coresight.dtsi
+++ b/qcom/sdxlemur-coresight.dtsi
@@ -148,6 +148,13 @@
 		arm,buffer-size = <0x400000>;
 		arm,scatter-gather;
 
+		qcom,qdss-ipa-support;
+		ipa-conn-data-base-pa = <0x1468B000>;
+		ipa-conn-data-size = <0x3000>;
+		ipa-conn-desc-base-pa = <0x1468E000>;
+		ipa-conn-desc-size = <0x1000>;
+		ipa-peer-evt-reg-pa = <0x6077818>;
+
 		coresight-name = "coresight-tmc-etr";
 		coresight-ctis = <&cti0 &cti3_swao>;
 		cti-reset-trig-num = <0>;