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clk: qcom: gcc: Add support for camera and video clks for MONACO
Add support for camera and video clks for clock clients to be able to request for the clocks in MONACO. Also update the gpucc_pll0_out_odd source to gpucc_pll0_out_even src for gfx clk src for MONACO. Change-Id: I3b4efffb828e38f684051b7265e5481b0bce14e5 Signed-off-by: Saurabh Sahu <sausah@codeaurora.org>
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2 changed files with 1460 additions and 320 deletions
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@ -162,12 +162,12 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = {
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};
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static const struct freq_tbl ftbl_gpu_cc_gx_gfx3d_clk_src[] = {
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F(310000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),
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F(470000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),
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F(583000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),
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F(700000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),
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F(900000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),
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F(1000000000, P_GPU_CC_PLL0_OUT_ODD, 1, 0, 0),
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F(310000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),
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F(470000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),
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F(583000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),
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F(700000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),
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F(900000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),
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F(1010000000, P_GPU_CC_PLL0_OUT_EVEN, 1, 0, 0),
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{ }
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};
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@ -194,7 +194,7 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src = {
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[VDD_LOW_L1] = 583000000,
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[VDD_NOMINAL] = 700000000,
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[VDD_HIGH] = 900000000,
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[VDD_HIGH_L1] = 1000000000},
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[VDD_HIGH_L1] = 1010000000},
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},
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};
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