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msm: kgsl: Migrate SCM calls in adreno

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- Migrate iommu_sync scm call to firmware/qcom_scm driver.
- Migrate a5xx_microcode_load to use qcom_scm_set_remote_state.

Change-Id: I05911ac6cf9366b4bff5ee02e6832b8728d1d35e
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
This commit is contained in:
Elliot Berman 2019-09-24 08:39:57 -07:00
commit f3261f7069
4 changed files with 30 additions and 0 deletions
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18
drivers/firmware/qcom_scm-smc.c
View file

@ -870,6 +870,24 @@ int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id)
return ret ? : desc.res[0];
}
void __qcom_scm_mmu_sync(struct device *dev, bool sync)
{
int ret;
struct qcom_scm_desc desc = {
.svc = QCOM_SCM_SVC_PWR,
.cmd = QCOM_SCM_PWR_MMU_SYNC,
.owner = ARM_SMCCC_OWNER_SIP
};
desc.args[0] = sync;
desc.arginfo = QCOM_SCM_ARGS(1);
ret = qcom_scm_call_atomic(dev, &desc);
if (ret)
pr_err("MMU sync with Hypervisor off %x\n", ret);
}
int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id, u32 spare)
{
struct qcom_scm_desc desc = {

6
drivers/firmware/qcom_scm.c
View file

@ -334,6 +334,12 @@ int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
}
EXPORT_SYMBOL(qcom_scm_io_writel);
void qcom_scm_mmu_sync(bool sync)
{
__qcom_scm_mmu_sync(__scm ? __scm->dev : NULL, sync);
}
EXPORT_SYMBOL(qcom_scm_mmu_sync);
int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare)
{
return __qcom_scm_restore_sec_cfg(__scm->dev, device_id, spare);

4
drivers/firmware/qcom_scm.h
View file

@ -47,6 +47,10 @@ extern int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned i
extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
u32 cmd_id);
#define QCOM_SCM_SVC_PWR 0x09
#define QCOM_SCM_PWR_MMU_SYNC 0x08
extern void __qcom_scm_mmu_sync(struct device *dev, bool sync);
#define QCOM_SCM_SVC_MP 0x0c
#define QCOM_SCM_MP_RESTORE_SEC_CFG 0x02
#define QCOM_SCM_MP_IOMMU_SECURE_PTBL_SIZE 0x03

2
include/linux/qcom_scm.h
View file

@ -49,6 +49,7 @@ extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
extern int qcom_scm_pas_shutdown(u32 peripheral);
extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
extern void qcom_scm_mmu_sync(bool sync);
extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
@ -87,6 +88,7 @@ static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
{ return -ENODEV; }
static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
{ return -ENODEV; }
static inline void qcom_scm_mmu_sync(bool sync) {}
static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare)
{ return -ENODEV; }
static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size)