From 961abd22d6bdd9b3286332ee3ee461a2ef8be6b1 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 8 Dec 2020 11:00:37 +0530 Subject: [PATCH 1/2] dt-bindings: interconnect: add interconnect bindings for direwolf l3 Add interconnect device bindings. These devices can be used to describe L3 based interconnect devices. Change-Id: Ibb88f58032eadf5bb0a8ec397a47e49bd69a7193 --- bindings/interconnect/qcom,epss-l3.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/bindings/interconnect/qcom,epss-l3.txt b/bindings/interconnect/qcom,epss-l3.txt index d3a31ad4e6df..0839062fa26e 100644 --- a/bindings/interconnect/qcom,epss-l3.txt +++ b/bindings/interconnect/qcom,epss-l3.txt @@ -9,8 +9,9 @@ Required properties : "qcom,lahaina-epss-l3-shared", "qcom,lahaina-epss-l3-cpu", "qcom,shima-epss-l3-cpu", - "qcom,shima-epss-l3-shared"; + "qcom,shima-epss-l3-shared", "qcom,yupik-epss-l3-cpu", + "qcom,direwolf-epss-l3-cpu"; - reg : Address and length of the register set for the device - clock-names: should contain "xo", "alternate" - clocks: list of phandle and clock specifier pairs corresponding to From b0c27282075e736c30751385b829d2373de01697 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Sun, 6 Dec 2020 10:56:44 +0530 Subject: [PATCH 2/2] ARM: dts: msm: add SPMI PMIC arbiter and PMIC devices for direwolf Add an SPMI PMIC arbiter device so that it is possible to communicate with PMICs attached to the SPMI bus and also add top level slave devices and their peripherals. Change-Id: If999da320e3212e787af6d22ceed562b808cf690 --- qcom/direwolf-adas.dtsi | 1 + qcom/direwolf-ivi.dtsi | 1 + qcom/direwolf-pmic.dtsi | 115 +++++++++++++ qcom/direwolf.dtsi | 22 +++ qcom/pm8540.dtsi | 364 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 503 insertions(+) create mode 100644 qcom/direwolf-pmic.dtsi create mode 100644 qcom/pm8540.dtsi diff --git a/qcom/direwolf-adas.dtsi b/qcom/direwolf-adas.dtsi index 589458f88196..97fb67c3ab6a 100644 --- a/qcom/direwolf-adas.dtsi +++ b/qcom/direwolf-adas.dtsi @@ -1,4 +1,5 @@ #include "direwolf.dtsi" +#include "direwolf-pmic.dtsi" / { model = "Qualcomm Technologies, Inc. DirewolfAU ADAS SoC"; diff --git a/qcom/direwolf-ivi.dtsi b/qcom/direwolf-ivi.dtsi index 9f12fa8801c1..b03269553b70 100644 --- a/qcom/direwolf-ivi.dtsi +++ b/qcom/direwolf-ivi.dtsi @@ -1,5 +1,6 @@ #include "direwolf.dtsi" #include "direwolf-ivi-regulators.dtsi" +#include "direwolf-pmic.dtsi" / { model = "Qualcomm Technologies, Inc. DirewolfAU IVI SoC"; diff --git a/qcom/direwolf-pmic.dtsi b/qcom/direwolf-pmic.dtsi new file mode 100644 index 000000000000..a41671dade16 --- /dev/null +++ b/qcom/direwolf-pmic.dtsi @@ -0,0 +1,115 @@ +#include "pm8540.dtsi" + +&thermal_zones { + pm8540_1_temp_alarm: pm8540_1_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8540_1_tz>; + wake-capable-sensor; + + trips { + pm8540_1_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8540_1_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + + trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8540_2_temp_alarm: pm8540_2_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8540_2_tz>; + wake-capable-sensor; + + trips { + pm8540_2_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8540_2_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + + trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8540_3_temp_alarm: pm8540_3_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8540_3_tz>; + wake-capable-sensor; + + trips { + pm8540_3_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8540_3_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + + trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8540_4_temp_alarm: pm8540_4_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8540_4_tz>; + wake-capable-sensor; + + trips { + pm8540_4_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8540_4_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + + trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +}; diff --git a/qcom/direwolf.dtsi b/qcom/direwolf.dtsi index 6cb13e465868..3a255032a8dd 100644 --- a/qcom/direwolf.dtsi +++ b/qcom/direwolf.dtsi @@ -890,6 +890,28 @@ qcom,freq-hw-domain = <&cpufreq_hw 0>, <&cpufreq_hw 1>; }; + spmi_bus: qcom,spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xc440000 0x1100>, + <0xc600000 0x2000000>, + <0xe600000 0x100000>, + <0xe700000 0xa0000>, + <0xc40a000 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + cell-index = <0>; + qcom,channel = <0>; + qcom,ee = <0>; + }; + + thermal_zones: thermal-zones { + }; + tlmm: pinctrl@f000000 { compatible = "qcom,direwolf-pinctrl"; reg = <0x0F000000 0x1000000>; diff --git a/qcom/pm8540.dtsi b/qcom/pm8540.dtsi new file mode 100644 index 000000000000..d4efec80f2a0 --- /dev/null +++ b/qcom/pm8540.dtsi @@ -0,0 +1,364 @@ +#include +#include +#include +#include +#include +#include + + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pm8540@0 { + compatible = "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8540_1_tz: qcom,temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pm8540_1_vadc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm8540_1_vadc: vadc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + /* Channel node */ + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + label = "vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + die_temp { + reg = ; + label = "die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + qcom,power-on@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, + <0x0 0x8 0x1 IRQ_TYPE_NONE>; + interrupt-names = "kpdpwr", "resin"; + qcom,pon-dbc-delay = <15625>; + qcom,kpdpwr-sw-debounce; + qcom,system-reset; + qcom,store-hard-reset-reason; + + qcom,pon_1 { + qcom,pon-type = ; + qcom,pull-up; + linux,code = ; + }; + + qcom,pon_2 { + qcom,pon-type = ; + qcom,pull-up; + linux,code = ; + }; + }; + + pm8540_1_clkdiv: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8540_1_div_clk1", + "pm8540_1_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8540_1_rtc: qcom,pm8540_1_rtc { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + }; + + pm8540_1_gpios: pinctrl@c000 { + compatible = "qcom,pm8150-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm8540_1_sdam_2: sdam@b100 { + compatible = "qcom,spmi-sdam"; + reg = <0xb100>; + }; + + }; + + qcom,pm8540@1 { + compatible ="qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* below definitions are for the second instance of pm8540 */ + qcom,pm8540@4 { + compatible = "qcom,spmi-pmic"; + reg = <4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8540_2_tz: qcom,temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pm8540_2_vadc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm8540_2_vadc: vadc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + /* Channel node */ + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + label = "vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + die_temp { + reg = ; + label = "die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + qcom,power-on@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pm8540_2_clkdiv: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8540_2_div_clk1", + "pm8540_2_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + status = "disabled"; + }; + + pm8540_2_gpios: pinctrl@c000 { + compatible = "qcom,pm8150-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,pm8540@5 { + compatible ="qcom,spmi-pmic"; + reg = <5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* below definitions are for the third instance of pm8540 */ + qcom,pm8540@8 { + compatible = "qcom,spmi-pmic"; + reg = <8 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8540_3_tz: qcom,temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pm8540_3_vadc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm8540_3_vadc: vadc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + /* Channel node */ + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + label = "vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + die_temp { + reg = ; + label = "die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + qcom,power-on@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pm8540_3_clkdiv: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8540_3_div_clk1", + "pm8540_3_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + status = "disabled"; + }; + + pm8540_3_gpios: pinctrl@c000 { + compatible = "qcom,pm8150-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,pm8540@9 { + compatible ="qcom,spmi-pmic"; + reg = <9 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* below definitions are for the forth instance of pm8540 */ + qcom,pm8540@C { + compatible = "qcom,spmi-pmic"; + reg = <12 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8540_4_tz: qcom,temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0xC 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pm8540_4_vadc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm8540_4_vadc: vadc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0xC 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + /* Channel node */ + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = ; + label = "vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + die_temp { + reg = ; + label = "die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + qcom,power-on@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pm8540_4_clkdiv: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8540_4_div_clk1", + "pm8540_4_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + status = "disabled"; + }; + + pm8540_4_gpios: pinctrl@c000 { + compatible = "qcom,pm8150-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,pm8540@D { + compatible ="qcom,spmi-pmic"; + reg = <13 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +};