diff --git a/qcom/rt9426a.dtsi b/qcom/rt9426a.dtsi new file mode 100644 index 000000000000..fd6b6c8b11ad --- /dev/null +++ b/qcom/rt9426a.dtsi @@ -0,0 +1,108 @@ +#include + +&qupv3_se0_i2c { + rt9426a@55 { + compatible = "richtek,rt9426a"; + reg = <0x55>; + status = "okay"; + interrupts-extended = <&tlmm 14 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rt9426a_alert>; + rt,dtsi_version = <01 709>; + rt,para_version = <0x0001>; + rt,battery_type = <4352>; + rt,volt_source = <3>; // 0:AP 1:FG_VBAT 2:FG_OCV; 3:FG_AV + rt,temp_source = <1>; // 0:AP 1:FG_TEMP 2:FG_INTT; 3:FG_AT + rt,curr_source = <2>; // 0:AP 1:FG_CURR 2:FG_AI + rt,offset_interpolation_order = <2 2>; + rt,soc_offset_size = <2 1>; + rt,soc_offset_data = <0 250 0 1000 250 0>; + rt,rs_ic_setting = <100>; /* unit:0.01mR ; 100x0.01 = 1.0mR */ + rt,rs_schematic = <100>; /* unit:0.01mR ; 100x0.01 = 1.0mR */ + rt,fg_extreg_table = [80 80 46 79 A7 BB 58 02 AA 85 5F 40 88 80 00 00 + 80 34 21 10 00 30 00 00 3F 0A 1D 32 12 05 1E 50 + 00 81 00 02 00 02 00 40 00 40 D0 07 D0 07 04 24 + 64 00 5F 0B 64 00 5F 0B FF 00 00 14 00 00 14 B7 + 15 0E 48 44 78 27 46 41 19 05 91 12 33 32 32 00 + 71 55 12 32 77 A5 04 73 22 33 52 68 A7 64 32 19 + 28 14 0E 08 08 06 06 06 05 05 08 08 06 05 05 03 + 03 F6 F6 F6 F2 F2 EC E6 EE EE EE E4 E4 DE D8 00 + 56 02 C0 48 00 09 00 00 00 00 00 00 00 00 37 73 + 2D 19 05 FB 00 00 B9 36 96 33 0F 07 00 00 0B A9 + 32 32 88 88 32 32 88 88 32 32 88 88 32 32 88 88 + 32 32 88 88 32 32 88 88 32 32 88 88 32 32 88 88 + 32 32 88 88 32 32 88 88 32 32 88 88 32 32 88 88 + 32 32 88 88 32 32 88 88 32 32 88 88 32 32 88 88 ]; + + /* add for smooth soc ; 2021-01-18 */ + rt,smooth_soc_en = <0>; /* 0: disable(default) ; 1: enable */ + /* add for aging cv ; 2021-01-18 */ + rt,fcc = <2000 2001 2002 2003 2004>; + rt,fg_fc_vth = <0x00 0x01 0x02 0x03 0x04>; + rt,fg_ocv_table0 = <0x0013 0x5000 0x5500 0x5933 0x5C1A 0x5C26 0x5D00 0x5E66 + 0x5FF3 0x610D 0x61F3 0x6333 0x6413 0x66A0 0x68F3 0x6A5A + 0x6B9A 0x6C1A 0x6E20 0x706D 0x1400 0x0433 0x023B 0x000D + 0x0038 0x004B 0x0031 0x0042 0x0055 0x00AD 0x0080 0x0081 + 0x0091 0x0092 0x0098 0x0039 0x0096 0x00EC 0x0013 0xFF80 + 0x0000 0x0200 0x049A 0x0680 0x0E4D 0x17E6 0x281A 0x309A + 0x3600 0x39B3 0x3D33 0x474D 0x4F80 0x5466 0x589A 0x5D1A + 0x6400 0x6900 0x000D 0x003D 0x0073 0x1300 0x0497 0x036E + 0x053A 0x03DD 0x0300 0x017B 0x0200 0x01FB 0x01C3 0x01C0 + 0x01AE 0x0480 0x01B4 0x0116 0xB0EF 0x0000 0x0000 0x0000 >; + rt,fg_ocv_table1 = <0x0013 0x44C0 0x4B00 0x55F3 0x5A60 0x5BED 0x5C93 0x5DFA + 0x5FA6 0x60AD 0x619A 0x62CD 0x63AD 0x662D 0x687A 0x69E0 + 0x6B0D 0x6C46 0x6DC0 0x706D 0x1900 0x0AF3 0x0367 0x01A2 + 0x002B 0x004B 0x0035 0x003E 0x0058 0x00A6 0x0080 0x007F + 0x0090 0x0092 0x008F 0x008B 0x006D 0x0112 0x0013 0xFF80 + 0x0000 0x0200 0x049A 0x0680 0x0E4D 0x17E6 0x281A 0x309A + 0x3600 0x39B3 0x3D33 0x474D 0x4F80 0x5466 0x589A 0x5D1A + 0x6400 0x6900 0x000A 0x0017 0x004B 0x009D 0x0600 0x036E + 0x04D6 0x0425 0x02EB 0x018B 0x0200 0x0205 0x01C8 0x01C0 + 0x01CA 0x01D6 0x0257 0x00EF 0x27A8 0x0000 0x0000 0x0000 >; + rt,fg_ocv_table2 = <0x0013 0x44C0 0x4B00 0x563A 0x5A93 0x5BF3 0x5CC0 0x5E00 + 0x5F93 0x60A6 0x619A 0x62CD 0x63A6 0x6626 0x687A 0x69E0 + 0x6B0D 0x6C4D 0x6DC0 0x706D 0x1900 0x0B3A 0x0359 0x0173 + 0x0035 0x0043 0x0032 0x0041 0x005A 0x00A6 0x007C 0x007F + 0x0091 0x0092 0x008F 0x008E 0x006C 0x0112 0x0013 0xFF80 + 0x0000 0x0200 0x049A 0x0680 0x0E4D 0x17E6 0x281A 0x309A + 0x3600 0x39B3 0x3D33 0x474D 0x4F80 0x5466 0x589A 0x5D1A + 0x6400 0x6900 0x000A 0x0017 0x004D 0x00B1 0x04E0 0x03D7 + 0x0525 0x03F4 0x02D8 0x018B 0x020F 0x0205 0x01C3 0x01C0 + 0x01CA 0x01CD 0x0261 0x00EF 0x5DCE 0x0000 0x0000 0x0000 >; + rt,fg_ocv_table3 = <0x0013 0x49C0 0x5500 0x5898 0x5AE2 0x5B24 0x5C24 0x5D50 + 0x5EF8 0x600E 0x60FE 0x61C1 0x62AA 0x654B 0x6770 0x68B9 + 0x69DB 0x6B1B 0x6CE0 0x706D 0x2D00 0x0398 0x01C3 0x0046 + 0x0042 0x003F 0x0034 0x0041 0x0059 0x006A 0x0085 0x0085 + 0x0086 0x0086 0x008A 0x008E 0x0083 0x016C 0x0013 0xFF80 + 0x0000 0x0200 0x049A 0x0680 0x0E4D 0x17E6 0x281A 0x309A + 0x3600 0x39B3 0x3D33 0x474D 0x4F80 0x5466 0x589A 0x5D1A + 0x6400 0x6900 0x0006 0x0047 0x0091 0x03A7 0x03E7 0x0418 + 0x04E5 0x03E9 0x02E3 0x026C 0x01EC 0x01EC 0x01E9 0x01E8 + 0x01DA 0x01CD 0x01F3 0x00B4 0x6E98 0x0000 0x0000 0x0000 >; + rt,fg_ocv_table4 = <0x0013 0x5000 0x5500 0x593A 0x5C20 0x5C26 0x5D13 0x5E60 + 0x5FED 0x60FA 0x61E6 0x631A 0x63FA 0x6673 0x68C0 0x6A20 + 0x6B5A 0x6BF3 0x6E20 0x706D 0x1400 0x043A 0x023B 0x0007 + 0x003D 0x0045 0x0031 0x003F 0x0058 0x00A6 0x0080 0x007D + 0x0090 0x0090 0x0095 0x0044 0x00A1 0x00EC 0x0013 0xFF80 + 0x0000 0x0200 0x049A 0x0680 0x0E4D 0x17E6 0x281A 0x309A + 0x3600 0x39B3 0x3D33 0x474D 0x4F80 0x5466 0x589A 0x5D1A + 0x6400 0x6900 0x000D 0x003D 0x0073 0x2600 0x0437 0x03B1 + 0x053A 0x040C 0x02EB 0x018B 0x0200 0x020A 0x01C8 0x01C8 + 0x01B7 0x03C0 0x0196 0x0116 0xCCCE 0x0000 0x0000 0x0000 >; + }; +}; + +&tlmm { + rt9426a_alert: rt9426a_alert { + mux { + pins = "gpio14"; + function = "gpio"; + }; + + config { + pins = "gpio14"; + drive-strength = <2>; + bias-pull-up; + }; + }; +};