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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-07 04:12:04 -04:00
Merge "msm: pcie: add option to disable L1ss TO for DRV suspend"
This commit is contained in:
commit
f3ed56f0e1
2 changed files with 15 additions and 7 deletions
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@ -616,6 +616,7 @@ struct msm_pcie_drv_info {
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u16 seq;
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u16 reply_seq;
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u32 timeout_ms; /* IPC command timeout */
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u32 l1ss_timeout_us;
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struct completion completion;
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};
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@ -5601,7 +5602,6 @@ static int msm_pcie_setup_drv(struct msm_pcie_dev_t *pcie_dev,
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struct msm_pcie_drv_msg *msg;
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struct msm_pcie_drv_tre *pkt;
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struct msm_pcie_drv_header *hdr;
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u32 drv_l1ss_timeout_us = 0;
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int ret;
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drv_info = devm_kzalloc(&pcie_dev->pdev->dev, sizeof(*drv_info),
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@ -5610,12 +5610,12 @@ static int msm_pcie_setup_drv(struct msm_pcie_dev_t *pcie_dev,
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return -ENOMEM;
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ret = of_property_read_u32(of_node, "qcom,drv-l1ss-timeout-us",
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&drv_l1ss_timeout_us);
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&drv_info->l1ss_timeout_us);
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if (ret)
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drv_l1ss_timeout_us = L1SS_TIMEOUT_US;
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drv_info->l1ss_timeout_us = L1SS_TIMEOUT_US;
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PCIE_DBG(pcie_dev, "PCIe: RC%d: DRV L1ss timeout: %dus\n",
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pcie_dev->rc_idx, drv_l1ss_timeout_us);
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pcie_dev->rc_idx, drv_info->l1ss_timeout_us);
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drv_info->dev_id = pcie_dev->rc_idx;
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@ -5631,7 +5631,7 @@ static int msm_pcie_setup_drv(struct msm_pcie_dev_t *pcie_dev,
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pkt->dword[0] = MSM_PCIE_DRV_CMD_ENABLE;
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pkt->dword[1] = hdr->dev_id;
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pkt->dword[2] = drv_l1ss_timeout_us / 1000;
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pkt->dword[2] = drv_info->l1ss_timeout_us / 1000;
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msg = &drv_info->drv_disable;
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pkt = &msg->pkt;
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@ -6947,11 +6947,13 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev)
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return 0;
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}
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static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev)
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static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev,
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u32 options)
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{
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struct rpmsg_device *rpdev = pcie_drv.rpdev;
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struct msm_pcie_drv_info *drv_info = pcie_dev->drv_info;
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struct msm_pcie_drv_msg *drv_enable = &drv_info->drv_enable;
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struct msm_pcie_drv_tre *pkt = &drv_enable->pkt;
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struct msm_pcie_clk_info_t *clk_info;
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int ret, i;
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@ -6974,6 +6976,11 @@ static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev)
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/* disable global irq - no more linkdown/aer detection */
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disable_irq(pcie_dev->irq[MSM_PCIE_INT_GLOBAL_INT].num);
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if (options & MSM_PCIE_CONFIG_NO_L1SS_TO)
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pkt->dword[2] = 0;
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else
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pkt->dword[2] = drv_info->l1ss_timeout_us / 1000;
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drv_info->reply_seq = drv_info->seq++;
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drv_enable->hdr.seq = drv_info->reply_seq;
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@ -7082,7 +7089,7 @@ int msm_pcie_pm_control(enum msm_pcie_pm_opt pm_opt, u32 busnr, void *user,
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PCIE_DBG(pcie_dev,
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"PCIe: RC%d: DRV: user requests for DRV suspend\n",
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rc_idx);
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ret = msm_pcie_drv_suspend(pcie_dev);
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ret = msm_pcie_drv_suspend(pcie_dev, options);
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break;
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case MSM_PCIE_SUSPEND:
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PCIE_DBG(&msm_pcie_dev[rc_idx],
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@ -12,6 +12,7 @@ enum msm_pcie_config {
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MSM_PCIE_CONFIG_NO_CFG_RESTORE = 0x1,
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MSM_PCIE_CONFIG_LINKDOWN = 0x2,
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MSM_PCIE_CONFIG_NO_RECOVERY = 0x4,
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MSM_PCIE_CONFIG_NO_L1SS_TO = 0x8,
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};
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enum msm_pcie_pm_opt {
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