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clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU

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The Allwinner H6 CCU has a "HDMI Slow Clock", which is currently missing
in the ccu-sun50i-h6 driver.

Add this missing clock to the driver.

Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
This commit is contained in:
Icenowy Zheng 2018-03-21 10:46:25 +08:00 • committed by Maxime Ripard
commit f422fa558a
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GPG key ID: D2B4C094214DAF74
3 changed files with 19 additions and 14 deletions
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4
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
View file

@ -643,6 +643,8 @@ static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents, 0xb00,
BIT(31), /* gate */
0);
static SUNXI_CCU_GATE(hdmi_slow_clk, "hdmi-slow", "osc24M", 0xb04, BIT(31), 0);
static const char * const hdmi_cec_parents[] = { "osc32k", "pll-periph0-2x" };
static const struct ccu_mux_fixed_prediv hdmi_cec_predivs[] = {
{ .index = 1, .div = 36621 },
@ -876,6 +878,7 @@ static struct ccu_common *sun50i_h6_ccu_clks[] = {
&pcie_aux_clk.common,
&bus_pcie_clk.common,
&hdmi_clk.common,
&hdmi_slow_clk.common,
&hdmi_cec_clk.common,
&bus_hdmi_clk.common,
&bus_tcon_top_clk.common,
@ -1017,6 +1020,7 @@ static struct clk_hw_onecell_data sun50i_h6_hw_clks = {
[CLK_PCIE_AUX] = &pcie_aux_clk.common.hw,
[CLK_BUS_PCIE] = &bus_pcie_clk.common.hw,
[CLK_HDMI] = &hdmi_clk.common.hw,
[CLK_HDMI_SLOW] = &hdmi_slow_clk.common.hw,
[CLK_HDMI_CEC] = &hdmi_cec_clk.common.hw,
[CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw,
[CLK_BUS_TCON_TOP] = &bus_tcon_top_clk.common.hw,

2
drivers/clk/sunxi-ng/ccu-sun50i-h6.h
View file

@ -51,6 +51,6 @@
#define CLK_BUS_DRAM 60
#define CLK_NUMBER 137
#define CLK_NUMBER (CLK_BUS_HDCP + 1)
#endif /* _CCU_SUN50I_H6_H_ */