From f4ef7e13ed6af7c658bf57ce2e2059b394c8bfa9 Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@qti.qualcomm.com>
Date: Thu, 17 Dec 2020 16:26:30 +0530
Subject: [PATCH] ARM: dts: msm: Update CAMCC clock node for YUPIK

Update the camera clock controller node to real
from dummmy.

Change-Id: Ifbfa1ebca24e6e927a0c288a1c5037aadd3d6401
---
 qcom/yupik-rumi.dtsi |  4 ++++
 qcom/yupik.dtsi      | 10 ++++++++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/qcom/yupik-rumi.dtsi b/qcom/yupik-rumi.dtsi
index c4b5ffdcba88..59020d3960ef 100644
--- a/qcom/yupik-rumi.dtsi
+++ b/qcom/yupik-rumi.dtsi
@@ -178,3 +178,7 @@
 &videocc {
 	clocks = <&bi_tcxo>, <&bi_tcxo_ao>, <&sleep_clk>, <&gcc GCC_VIDEO_AHB_CLK>;
 };
+
+&camcc {
+	clocks = <&bi_tcxo>, <&bi_tcxo_ao>, <&sleep_clk>, <&gcc GCC_CAMERA_AHB_CLK>;
+};
diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi
index 768db173d15a..1534acfa43fc 100644
--- a/qcom/yupik.dtsi
+++ b/qcom/yupik.dtsi
@@ -635,8 +635,14 @@
 	};
 
 	camcc: clock-controller@ad00000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "camcc_clocks";
+		compatible = "qcom,yupik-camcc", "syscon";
+		reg = <0xad00000 0x10000>;
+		reg-names = "cc_base";
+		vdd_mx-supply = <&VDD_MX_LEVEL>;
+		vdd_cx-supply = <&VDD_CX_LEVEL>;
+		clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,
+			<&sleep_clk>, <&gcc GCC_CAMERA_AHB_CLK>;
+		clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "cfg_ahb";
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};