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net: stmmac: Enable PPS0 on bootup

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Enable PPS0 for 19.2 MHz frequency on initializing PTP.

Change-Id: I15d5fc2d15dd38926970ac7a61f9362604a860a8
Acked-by: Nagarjuna Chaganti <nchagant@qti.qualcomm.com>
Signed-off-by: Suraj Jaiswal <jsuraj@codeaurora.org>
This commit is contained in:
Suraj Jaiswal 2021-03-17 15:48:15 +05:30 • committed by Gerrit - the friendly Code Review server
commit f5cfd4ff35
4 changed files with 48 additions and 0 deletions
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2
drivers/net/ethernet/stmicro/stmmac/Makefile
View file

@ -32,5 +32,7 @@ obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
stmmac-platform-objs:= stmmac_platform.o
dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
ccflags-$(CONFIG_PTP_1588_CLOCK)+=-DCONFIG_PTPSUPPORT_OBJ
obj-$(CONFIG_STMMAC_PCI) += stmmac-pci.o
stmmac-pci-objs:= stmmac_pci.o

39
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-pps.c
View file

@ -119,6 +119,7 @@ int ppsout_stop(struct stmmac_priv *priv, struct pps_cfg *eth_pps_cfg)
u32 val;
void __iomem *ioaddr = priv->ioaddr;
val = readl_relaxed(ioaddr + MAC_PPS_CONTROL);
val |= PPSCMDX(eth_pps_cfg->ppsout_ch, 0x5);
val |= TRGTMODSELX(eth_pps_cfg->ppsout_ch, 0x3);
val |= PPSEN0;
@ -178,6 +179,17 @@ static void ethqos_register_pps_isr(struct stmmac_priv *priv, int ch)
}
}
static void ethqos_unregister_pps_isr(struct stmmac_priv *priv, int ch)
{
struct qcom_ethqos *ethqos = priv->plat->bsp_priv;
if (ch == DWC_ETH_QOS_PPS_CH_2) {
free_irq(ethqos->pps_class_a_irq, priv);
} else if (ch == DWC_ETH_QOS_PPS_CH_3) {
free_irq(ethqos->pps_class_b_irq, priv);
}
}
int ppsout_config(struct stmmac_priv *priv, struct ifr_data_struct *req)
{
struct pps_cfg *eth_pps_cfg = (struct pps_cfg *)req->ptr;
@ -187,6 +199,9 @@ int ppsout_config(struct stmmac_priv *priv, struct ifr_data_struct *req)
if (!eth_pps_cfg->ppsout_start) {
ppsout_stop(priv, eth_pps_cfg);
if (eth_pps_cfg->ppsout_ch == DWC_ETH_QOS_PPS_CH_2 ||
eth_pps_cfg->ppsout_ch == DWC_ETH_QOS_PPS_CH_3)
ethqos_unregister_pps_isr(priv, eth_pps_cfg->ppsout_ch);
return 0;
}
@ -238,6 +253,30 @@ int ppsout_config(struct stmmac_priv *priv, struct ifr_data_struct *req)
return 0;
}
int ethqos_init_pps(struct stmmac_priv *priv)
{
u32 value;
struct ifr_data_struct req = {0};
struct pps_cfg eth_pps_cfg = {0};
priv->ptpaddr = priv->ioaddr + PTP_GMAC4_OFFSET;
value = (PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | PTP_TCR_TSUPDT);
priv->hw->ptp->config_hw_tstamping(priv->ptpaddr, value);
priv->hw->ptp->init_systime(priv->ptpaddr, 0, 0);
priv->hw->ptp->adjust_systime(priv->ptpaddr, 0, 0, 0, 1);
/*Configuaring PPS0 PPS output frequency to default 19.2 Mhz*/
eth_pps_cfg.ppsout_ch = 0;
eth_pps_cfg.ptpclk_freq = 62500000;
eth_pps_cfg.ppsout_freq = 19200000;
eth_pps_cfg.ppsout_start = 1;
eth_pps_cfg.ppsout_duty = 50;
req.ptr = (void *)&eth_pps_cfg;
ppsout_config(priv, &req);
return 0;
}
int ethqos_handle_prv_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
struct stmmac_priv *pdata = netdev_priv(dev);

1
drivers/net/ethernet/stmicro/stmmac/stmmac.h
View file

@ -261,6 +261,7 @@ extern struct emac_emb_smmu_cb_ctx emac_emb_smmu_ctx;
#define GET_MEM_PDEV_DEV (emac_emb_smmu_ctx.valid ? \
&emac_emb_smmu_ctx.smmu_pdev->dev : priv->device)
int ethqos_handle_prv_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int ethqos_init_pps(struct stmmac_priv *priv);
extern bool phy_intr_en;
int stmmac_mdio_unregister(struct net_device *ndev);

6
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View file

@ -2616,6 +2616,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
netdev_warn(priv->dev, "PTP init failed\n");
else
ret = clk_set_rate(priv->plat->clk_ptp_ref, 96000000);
ret = ethqos_init_pps(priv);
}
priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
@ -2719,7 +2720,12 @@ static int stmmac_open(struct net_device *dev)
goto init_error;
}
#ifdef CONFIG_PTPSUPPORT_OBJ
ret = stmmac_hw_setup(dev, true);
#else
ret = stmmac_hw_setup(dev, false);
#endif
if (ret < 0) {
netdev_err(priv->dev, "%s: Hw setup failed\n", __func__);
goto init_error;