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ACPI / LPSS: add support for Intel BayTrail

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Intel BayTrail has almost the same Low Power Subsystem than Lynxpoint with
few differences. Peripherals are clocked with different speeds (typically
lower) and the clock is not always gated. To support this we add
possibility to share a common fixed rate clock and make clock gating
optional.

Signed-off-by: Mika Westerberg <[email protected]>
Acked-by: Mike Turquette <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
This commit is contained in:
Mika Westerberg 2013-05-13 12:42:44 +00:00 • committed by Rafael J. Wysocki
commit f627217064
2 changed files with 82 additions and 10 deletions
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4
drivers/clk/x86/clk-lpt.c
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@ -1,5 +1,5 @@
/*
* Intel Lynxpoint LPSS clocks.
* Intel Low Power Subsystem clocks.
*
* Copyright (C) 2013, Intel Corporation
* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
@ -18,8 +18,6 @@
#include <linux/platform_data/clk-lpss.h>
#include <linux/platform_device.h>
#define PRV_CLOCK_PARAMS 0x800
static int lpt_clk_probe(struct platform_device *pdev)
{
struct lpss_clk_data *drvdata;