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PCI: aerdrv: redefine PCI_ERR_ROOT_*_SRC
The Error Source Identification Register (Offset 34h) is 4 byte which contains a couple of 2 byte field, "[15:0] ERR_COR Source Identification" and "[31:16] ERR_FATAL/NONFATAL Source Identification." This patch defines PCI_ERR_ROOT_ERR_SRC to make dword access sensible. Signed-off-by: Hidetoshi Seto <[email protected]> Reviewed-by: Kenji Kaneshige <[email protected]> Signed-off-by: Jesse Barnes <[email protected]>
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3 changed files with 3 additions and 4 deletions
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@ -168,7 +168,7 @@ static u32 *find_pci_config_dword(struct aer_error *err, int where,
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target = &err->root_status;
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rw1cs = 1;
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break;
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case PCI_ERR_ROOT_COR_SRC:
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case PCI_ERR_ROOT_ERR_SRC:
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target = &err->source_id;
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break;
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}
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@ -210,7 +210,7 @@ irqreturn_t aer_irq(int irq, void *context)
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}
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/* Read error source and clear error status */
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pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_COR_SRC, &id);
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pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_ERR_SRC, &id);
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pci_write_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, status);
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/* Store error source for later DPC handler */
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