From ccc85c30bc5cc65846417677e6f8bd490fd97738 Mon Sep 17 00:00:00 2001 From: Saurabh Ambulkar Date: Mon, 28 Sep 2020 18:32:47 +0530 Subject: [PATCH] ARM: dts: msm: Add slpi pinctrl to SM6150 Add slpi pinctrl support for SM6150. Change-Id: I20c4f9f2648a0732c880c9e7edcd58afb6f995c5 --- qcom/sa6155.dtsi | 4 ++++ qcom/sa6155p.dtsi | 4 ++++ qcom/sm6150-slpi-pinctrl.dtsi | 11 +++++++++++ qcom/sm6150.dtsi | 1 + 4 files changed, 20 insertions(+) create mode 100644 qcom/sm6150-slpi-pinctrl.dtsi diff --git a/qcom/sa6155.dtsi b/qcom/sa6155.dtsi index 5dad61ae51e4..7b5707a384aa 100644 --- a/qcom/sa6155.dtsi +++ b/qcom/sa6155.dtsi @@ -35,3 +35,7 @@ &videocc { compatible = "qcom,sa6155-videocc", "syscon"; }; + +&slpi_tlmm { + status = "ok"; +}; diff --git a/qcom/sa6155p.dtsi b/qcom/sa6155p.dtsi index 59ff2bc74431..946016505e0f 100644 --- a/qcom/sa6155p.dtsi +++ b/qcom/sa6155p.dtsi @@ -53,3 +53,7 @@ &videocc { compatible = "qcom,sa6155-videocc", "syscon"; }; + +&slpi_tlmm { + status = "ok"; +}; diff --git a/qcom/sm6150-slpi-pinctrl.dtsi b/qcom/sm6150-slpi-pinctrl.dtsi new file mode 100644 index 000000000000..e6b1a10033c7 --- /dev/null +++ b/qcom/sm6150-slpi-pinctrl.dtsi @@ -0,0 +1,11 @@ + +&soc { + slpi_tlmm: slpi_pinctrl@62B40000 { + compatible = "qcom,slpi-pinctrl"; + reg = <0x62B40000 0x20000>; + qcom,num-pins = <32>; + clock-names = "ssc-clk"; + clocks = <&scc SCC_QUPV3_S_HCLK_CLK>; + status = "disabled"; + }; +}; diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi index ecf2201756e0..8bea8fb0a976 100644 --- a/qcom/sm6150.dtsi +++ b/qcom/sm6150.dtsi @@ -1776,3 +1776,4 @@ }; #include "msm-arm-smmu-sm6150.dtsi" +#include "sm6150-slpi-pinctrl.dtsi"