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Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3657/1: S3C24XX: Documentation update of Overview.txt [ARM] Update mach-types [ARM] 3656/1: S3C2412: Add S3C2412 and S3C2413 documenation [ARM] 3654/1: add ajeco 1arm sbc support [ARM] fix drivers/mfd/ucb1x00-core.c IRQ probing bug [ARM] 3651/1: S3C24XX: Make arch list more detailed [ARM] 3650/1: S3C2412: Update s3c2410_defconfig [ARM] 3649/1: S3C24XX: Fix capitalisation of CPU on SMDK2440 [ARM] 3612/1: make pci bus optional for ixp4xx platform [ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ [ARM] Remove save_lr/restore_pc macros [ARM] Remove partial non-v6 binutils compatibility [ARM] Remove LOADREGS macro [ARM] Remove RETINSTR macro
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commit
f6e6e88373
45 changed files with 1515 additions and 192 deletions
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@ -55,30 +55,6 @@
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#define PLD(code...)
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#endif
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#define MODE_USR USR_MODE
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#define MODE_FIQ FIQ_MODE
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#define MODE_IRQ IRQ_MODE
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#define MODE_SVC SVC_MODE
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#define DEFAULT_FIQ MODE_FIQ
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/*
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* LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
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*/
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#ifdef __STDC__
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#define LOADREGS(cond, base, reglist...)\
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ldm##cond base,reglist
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#else
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#define LOADREGS(cond, base, reglist...)\
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ldm/**/cond base,reglist
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#endif
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/*
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* Build a return instruction for this processor type.
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*/
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#define RETINSTR(instr, regs...)\
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instr regs
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/*
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* Enable and disable interrupts
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*/
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@ -117,18 +93,6 @@
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msr cpsr_c, \oldcpsr
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.endm
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/*
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* These two are used to save LR/restore PC over a user-based access.
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* The old 26-bit architecture requires that we do. On 32-bit
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* architecture, we can safely ignore this requirement.
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*/
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.macro save_lr
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.endm
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.macro restore_pc
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mov pc, lr
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.endm
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#define USER(x...) \
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9999: x; \
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.section __ex_table,"a"; \
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