diff --git a/include/dt-bindings/clock/qcom,camcc-shima.h b/include/dt-bindings/clock/qcom,camcc-shima.h
index e9de638c0531..92a82fe290cc 100644
--- a/include/dt-bindings/clock/qcom,camcc-shima.h
+++ b/include/dt-bindings/clock/qcom,camcc-shima.h
@@ -119,12 +119,4 @@
 #define CAM_CC_SLOW_AHB_CLK_SRC					109
 #define CAM_CC_XO_CLK_SRC					110
 
-/* CAM_CC resets */
-#define CAM_CC_BPS_BCR						0
-#define CAM_CC_ICP_BCR						1
-#define CAM_CC_IFE_0_BCR					2
-#define CAM_CC_IFE_1_BCR					3
-#define CAM_CC_IFE_2_BCR					4
-#define CAM_CC_IPE_0_BCR					5
-
 #endif
diff --git a/include/dt-bindings/clock/qcom,gpucc-shima.h b/include/dt-bindings/clock/qcom,gpucc-shima.h
index 34618346dbaf..ce3fa1f0bc3c 100644
--- a/include/dt-bindings/clock/qcom,gpucc-shima.h
+++ b/include/dt-bindings/clock/qcom,gpucc-shima.h
@@ -7,48 +7,25 @@
 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SHIMA_H
 
 /* GPU_CC clocks */
-#define GPU_CC_PLL0						0
-#define GPU_CC_PLL1						1
-#define GPU_CC_ACD_AHB_CLK					2
-#define GPU_CC_ACD_CXO_CLK					3
-#define GPU_CC_AHB_CLK						4
-#define GPU_CC_CB_CLK						5
-#define GPU_CC_CRC_AHB_CLK					6
-#define GPU_CC_CX_APB_CLK					7
-#define GPU_CC_CX_GFX3D_CLK					8
-#define GPU_CC_CX_GFX3D_SLV_CLK					9
-#define GPU_CC_CX_GMU_CLK					10
-#define GPU_CC_CX_SNOC_DVM_CLK					11
-#define GPU_CC_CXO_AON_CLK					12
-#define GPU_CC_CXO_CLK						13
-#define GPU_CC_FREQ_MEASURE_CLK					14
-#define GPU_CC_GMU_CLK_SRC					15
-#define GPU_CC_GX_CXO_CLK					16
-#define GPU_CC_GX_GFX3D_CLK					17
-#define GPU_CC_GX_GFX3D_CLK_SRC					18
-#define GPU_CC_GX_GMU_CLK					19
-#define GPU_CC_GX_VSENSE_CLK					20
-#define GPU_CC_HUB_AHB_DIV_CLK_SRC				21
-#define GPU_CC_HUB_AON_CLK					22
-#define GPU_CC_HUB_CLK_SRC					23
-#define GPU_CC_HUB_CX_INT_CLK					24
-#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC				25
-#define GPU_CC_MND1X_0_GFX3D_CLK				26
-#define GPU_CC_MND1X_1_GFX3D_CLK				27
-#define GPU_CC_RBCPR_AHB_CLK					28
-#define GPU_CC_RBCPR_CLK					29
-#define GPU_CC_RBCPR_CLK_SRC					30
-#define GPU_CC_SLEEP_CLK					31
-
-/* GPU_CC resets */
-#define GPUCC_GPU_CC_ACD_BCR					0
-#define GPUCC_GPU_CC_CB_BCR					1
-#define GPUCC_GPU_CC_CX_BCR					2
-#define GPUCC_GPU_CC_FAST_HUB_BCR				3
-#define GPUCC_GPU_CC_GFX3D_AON_BCR				4
-#define GPUCC_GPU_CC_GMU_BCR					5
-#define GPUCC_GPU_CC_GX_BCR					6
-#define GPUCC_GPU_CC_RBCPR_BCR					7
-#define GPUCC_GPU_CC_XO_BCR					8
+#define GPU_CC_PLL1						0
+#define GPU_CC_AHB_CLK						1
+#define GPU_CC_CB_CLK						2
+#define GPU_CC_CRC_AHB_CLK					3
+#define GPU_CC_CX_APB_CLK					4
+#define GPU_CC_CX_GMU_CLK					5
+#define GPU_CC_CX_SNOC_DVM_CLK					6
+#define GPU_CC_CXO_AON_CLK					7
+#define GPU_CC_CXO_CLK						8
+#define GPU_CC_GMU_CLK_SRC					9
+#define GPU_CC_GX_GMU_CLK					10
+#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK				11
+#define GPU_CC_HUB_AHB_DIV_CLK_SRC				12
+#define GPU_CC_HUB_AON_CLK					13
+#define GPU_CC_HUB_CLK_SRC					14
+#define GPU_CC_HUB_CX_INT_CLK					15
+#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC				16
+#define GPU_CC_MND1X_0_GFX3D_CLK				17
+#define GPU_CC_MND1X_1_GFX3D_CLK				18
+#define GPU_CC_SLEEP_CLK					19
 
 #endif