diff --git a/Makefile b/Makefile
index 44714b7440f5..ecbee305dbf2 100644
--- a/Makefile
+++ b/Makefile
@@ -22,6 +22,10 @@ ifeq ($(CONFIG_ARCH_HOLI), y)
 include $(srctree)/techpack/camera/config/holicamera.conf
 endif
 
+ifeq ($(CONFIG_ARCH_BLAIR), y)
+include $(srctree)/techpack/camera/config/blaircamera.conf
+endif
+
 ifeq ($(CONFIG_ARCH_SHIMA), y)
 include $(srctree)/techpack/camera/config/shimacamera.conf
 endif
@@ -55,6 +59,11 @@ LINUXINCLUDE    += \
 		-include $(srctree)/techpack/camera/config/holicameraconf.h
 endif
 
+ifeq ($(CONFIG_ARCH_BLAIR), y)
+LINUXINCLUDE    += \
+		-include $(srctree)/techpack/camera/config/blaircameraconf.h
+endif
+
 ifeq ($(CONFIG_ARCH_SHIMA), y)
 LINUXINCLUDE    += \
 		-include $(srctree)/techpack/camera/config/shimacameraconf.h
diff --git a/config/blaircamera.conf b/config/blaircamera.conf
new file mode 100644
index 000000000000..be2ce67888d1
--- /dev/null
+++ b/config/blaircamera.conf
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+ifeq ($(CONFIG_QGKI),y)
+export CONFIG_SPECTRA_CAMERA=y
+$(info "SPECTRA_CAMERA IS STATIC")
+else
+$(info "SPECTRA_CAMERA IS MODULAR")
+export CONFIG_SPECTRA_CAMERA=m
+endif
+
+ifneq (,$(filter $(CONFIG_SPECTRA_CAMERA), y m))
+export CONFIG_SPECTRA_ISP=y
+export CONFIG_SPECTRA_OPE=y
+export CONFIG_SPECTRA_TFE=y
+export CONFIG_SPECTRA_SENSOR=y
+endif
diff --git a/config/blaircameraconf.h b/config/blaircameraconf.h
new file mode 100644
index 000000000000..816797dee642
--- /dev/null
+++ b/config/blaircameraconf.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#define CONFIG_SPECTRA_CAMERA      1
+#define CONFIG_SPECTRA_ISP         1
+#define CONFIG_SPECTRA_OPE         1
+#define CONFIG_SPECTRA_TFE         1
+#define CONFIG_SPECTRA_SENSOR      1
diff --git a/drivers/cam_cpas/cpas_top/cam_cpastop_hw.c b/drivers/cam_cpas/cpas_top/cam_cpastop_hw.c
index 6447b3b40dc3..01a376dd51c1 100644
--- a/drivers/cam_cpas/cpas_top/cam_cpastop_hw.c
+++ b/drivers/cam_cpas/cpas_top/cam_cpastop_hw.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/delay.h>
@@ -28,6 +28,7 @@
 #include "cpastop_v540_100.h"
 #include "cpastop_v520_100.h"
 #include "cpastop_v545_100.h"
+#include "cpastop_v545_110.h"
 #include "cpastop_v570_200.h"
 #include "cpastop_v680_100.h"
 #include "cpastop_v165_100.h"
@@ -119,7 +120,7 @@ static const uint32_t cam_cpas_hw_version_map
 	{
 		CAM_CPAS_TITAN_545_V100,
 		0,
-		0,
+		CAM_CPAS_TITAN_545_V110,
 		0,
 		0,
 		0,
@@ -934,6 +935,10 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw,
 		camnoc_info = &cam545_cpas100_camnoc_info;
 		qchannel_info = &cam545_cpas100_qchannel_info;
 		break;
+	case CAM_CPAS_TITAN_545_V110:
+		camnoc_info = &cam545_cpas110_camnoc_info;
+		qchannel_info = &cam545_cpas110_qchannel_info;
+		break;
 	case CAM_CPAS_TITAN_570_V200:
 		camnoc_info = &cam570_cpas200_camnoc_info;
 		qchannel_info = &cam570_cpas200_qchannel_info;
diff --git a/drivers/cam_cpas/cpas_top/cpastop_v545_110.h b/drivers/cam_cpas/cpas_top/cpastop_v545_110.h
new file mode 100644
index 000000000000..d8833047c250
--- /dev/null
+++ b/drivers/cam_cpas/cpas_top/cpastop_v545_110.h
@@ -0,0 +1,322 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _CPASTOP_V545_110_H_
+#define _CPASTOP_V545_110_H_
+
+#define TEST_IRQ_ENABLE 0
+
+static struct cam_camnoc_irq_sbm cam_cpas_v545_110_irq_sbm = {
+	.sbm_enable = {
+		.access_type = CAM_REG_TYPE_READ_WRITE,
+		.enable = true,
+		.offset = 0xA40, /* SBM_FAULTINEN0_LOW */
+		.value = 0x1 | /* SBM_FAULTINEN0_LOW_PORT0_MASK*/
+			(TEST_IRQ_ENABLE ?
+			0x2 : /* SBM_FAULTINEN0_LOW_PORT6_MASK */
+			0x0) /* SBM_FAULTINEN0_LOW_PORT1_MASK */,
+	},
+	.sbm_status = {
+		.access_type = CAM_REG_TYPE_READ,
+		.enable = true,
+		.offset = 0xA48, /* SBM_FAULTINSTATUS0_LOW */
+	},
+	.sbm_clear = {
+		.access_type = CAM_REG_TYPE_WRITE,
+		.enable = true,
+		.offset = 0xA80, /* SBM_FLAGOUTCLR0_LOW */
+		.value = TEST_IRQ_ENABLE ? 0x3 : 0x1,
+	}
+};
+
+static struct cam_camnoc_irq_err
+	cam_cpas_v545_110_irq_err[] = {
+	{
+		.irq_type = CAM_CAMNOC_HW_IRQ_SLAVE_ERROR,
+		.enable = true,
+		.sbm_port = 0x1, /* SBM_FAULTINSTATUS0_LOW_PORT0_MASK */
+		.err_enable = {
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.enable = true,
+			.offset = 0xD08, /* ERRORLOGGER_MAINCTL_LOW */
+			.value = 1,
+		},
+		.err_status = {
+			.access_type = CAM_REG_TYPE_READ,
+			.enable = true,
+			.offset = 0xD10, /* ERRORLOGGER_ERRVLD_LOW */
+		},
+		.err_clear = {
+			.access_type = CAM_REG_TYPE_WRITE,
+			.enable = true,
+			.offset = 0xD18, /* ERRORLOGGER_ERRCLR_LOW */
+			.value = 1,
+		},
+	},
+	{
+		.irq_type = CAM_CAMNOC_HW_IRQ_CAMNOC_TEST,
+		.enable = TEST_IRQ_ENABLE ? true : false,
+		.sbm_port = 0x2, /* SBM_FAULTINSTATUS0_LOW_PORT6_MASK */
+		.err_enable = {
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.enable = true,
+			.offset = 0xA88, /* SBM_FLAGOUTSET0_LOW */
+			.value = 0x1,
+		},
+		.err_status = {
+			.access_type = CAM_REG_TYPE_READ,
+			.enable = true,
+			.offset = 0xA90, /* SBM_FLAGOUTSTATUS0_LOW */
+		},
+		.err_clear = {
+			.enable = false,
+		},
+	},
+};
+
+
+static struct cam_camnoc_specific
+	cam_cpas_v545_110_camnoc_specific[] = {
+	{
+		.port_type = CAM_CAMNOC_CDM,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
+			.value = 0x33333333,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
+			.value = 0x33333333,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE38, /* CDM_URGENCY_LOW */
+			.value = 0x00000003,
+		},
+		.danger_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE40, /* CDM_DANGERLUT_LOW */
+			.value = 0x0,
+		},
+		.safe_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE48, /* CDM_SAFELUT_LOW */
+			.value = 0x0,
+		},
+		.ubwc_ctl = {
+			.enable = false,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_TFE,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_LOW */
+			.offset = 0x30,
+			.value = 0x55554433,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_HIGH */
+			.offset = 0x34,
+			.value = 0x66666655,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x38, /* TFE_URGENCY_LOW */
+			.value = 0x00001030,
+		},
+		.danger_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x40, /* TFE_DANGERLUT_LOW */
+			.value = 0xffff0000,
+		},
+		.safe_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x48, /* TFE_SAFELUT_LOW */
+			.value = 0x00000003,
+		},
+		.ubwc_ctl = {
+			/*
+			 * Do not explicitly set ubwc config register.
+			 * Power on default values are taking care of required
+			 * register settings.
+			 */
+			.enable = false,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_TFE_1,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_LOW */
+			.offset = 0x4030,
+			.value = 0x55554433,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_HIGH */
+			.offset = 0x4034,
+			.value = 0x66666655,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x4038, /* TFE_URGENCY_LOW */
+			.value = 0x00001030,
+		},
+		.danger_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x4040, /* TFE_DANGERLUT_LOW */
+			.value = 0xffff0000,
+		},
+		.safe_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x4048, /* TFE_SAFELUT_LOW */
+			.value = 0x00000003,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_TFE_2,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_LOW */
+			.offset = 0x5030,
+			.value = 0x55554433,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_HIGH */
+			.offset = 0x5034,
+			.value = 0x66666655,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x5038, /* TFE_URGENCY_LOW */
+			.value = 0x00001030,
+		},
+		.danger_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x5040, /* TFE_DANGERLUT_LOW */
+			.value = 0xffff0000,
+		},
+		.safe_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x5048, /* TFE_SAFELUT_LOW */
+			.value = 0x00000003,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_OPE,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
+			.value = 0x33333333,
+		},
+		.priority_lut_high = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
+			.value = 0x33333333,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x438, /* OPE_URGENCY_LOW */
+			.value = 0x00000033,
+		},
+		.danger_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x440, /* OPE_DANGERLUT_LOW */
+			.value = 0xFFFFFF00,
+		},
+		.safe_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x448, /* OPE_SAFELUT_LOW */
+			.value = 0xF,
+		},
+		.ubwc_ctl = {
+			/*
+			 * Do not explicitly set ubwc config register.
+			 * Power on default values are taking care of required
+			 * register settings.
+			 */
+			.enable = false,
+		},
+	},
+};
+
+static struct cam_camnoc_err_logger_info cam545_cpas110_err_logger_offsets = {
+	.mainctrl     =  0xD08, /* ERRLOGGER_MAINCTL_LOW */
+	.errvld       =  0xD10, /* ERRLOGGER_ERRVLD_LOW */
+	.errlog0_low  =  0xD20, /* ERRLOGGER_ERRLOG0_LOW */
+	.errlog0_high =  0xD24, /* ERRLOGGER_ERRLOG0_HIGH */
+	.errlog1_low  =  0xD28, /* ERRLOGGER_ERRLOG1_LOW */
+	.errlog1_high =  0xD2C, /* ERRLOGGER_ERRLOG1_HIGH */
+	.errlog2_low  =  0xD30, /* ERRLOGGER_ERRLOG2_LOW */
+	.errlog2_high =  0xD34, /* ERRLOGGER_ERRLOG2_HIGH */
+	.errlog3_low  =  0xD38, /* ERRLOGGER_ERRLOG3_LOW */
+	.errlog3_high =  0xD3C, /* ERRLOGGER_ERRLOG3_HIGH */
+};
+
+static struct cam_camnoc_info cam545_cpas110_camnoc_info = {
+	.specific = &cam_cpas_v545_110_camnoc_specific[0],
+	.specific_size =  ARRAY_SIZE(cam_cpas_v545_110_camnoc_specific),
+	.irq_sbm = &cam_cpas_v545_110_irq_sbm,
+	.irq_err = &cam_cpas_v545_110_irq_err[0],
+	.irq_err_size = ARRAY_SIZE(cam_cpas_v545_110_irq_err),
+	.err_logger = &cam545_cpas110_err_logger_offsets,
+	.errata_wa_list = NULL,
+};
+
+static struct cam_cpas_camnoc_qchannel cam545_cpas110_qchannel_info = {
+	.qchannel_ctrl   = 0x14,
+	.qchannel_status = 0x18,
+};
+#endif /* _CPASTOP_V545_110_H_ */
diff --git a/drivers/cam_cpas/include/cam_cpas_api.h b/drivers/cam_cpas/include/cam_cpas_api.h
index 2b82d1f283e4..87fe72a42a64 100644
--- a/drivers/cam_cpas/include/cam_cpas_api.h
+++ b/drivers/cam_cpas/include/cam_cpas_api.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _CAM_CPAS_API_H_
@@ -139,6 +139,7 @@ enum cam_cpas_hw_version {
 	CAM_CPAS_TITAN_540_V100 = 0x540100,
 	CAM_CPAS_TITAN_520_V100 = 0x520100,
 	CAM_CPAS_TITAN_545_V100 = 0x545100,
+	CAM_CPAS_TITAN_545_V110 = 0x545110,
 	CAM_CPAS_TITAN_570_V200 = 0x570200,
 	CAM_CPAS_TITAN_680_V100 = 0x680100,
 	CAM_CPAS_TITAN_MAX