dlkm: Support the touch hx83112f for nairo

- Add support for hx83112f based on himax_v2. - This is bringup change for himax_v2 and fixed some existing bugs. Change-Id: Ibd20af124e4259f02d7ad61098db57a1d32e7164 Signed-off-by: wengjun1 <wengjun1@motorola.com> Reviewed-on: https://gerrit.mot.com/1535709 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Dezhen Hou <houdz1@motorola.com> Reviewed-by: Huosheng Liao <liaohs@motorola.com> Submit-Approved: Jira Key
2026-10-08 21:22:09 -04:00 · 2020-04-16 17:42:57 +08:00 · 2020-04-16 17:42:57 +08:00 · f71b0a79fb
commit f71b0a79fb
parent b554de9724
38 changed files with 22761 additions and 0 deletions
--- a/drivers/input/touchscreen/himax_0flash_mmi/Android.mk
+++ b/drivers/input/touchscreen/himax_0flash_mmi/Android.mk
@ -0,0 +1,43 @@
+DLKM_DIR := motorola/kernel/modules
+LOCAL_PATH := $(call my-dir)
+
+ifeq ($(DLKM_INSTALL_TO_VENDOR_OUT),true)
+HIMAX_MMI_MODULE_PATH := $(TARGET_OUT_VENDOR)/lib/modules/
+else
+HIMAX_MMI_MODULE_PATH := $(KERNEL_MODULES_OUT)
+endif
+
+ifeq ($(HIMAX_V2_MMI_0FLASH),true)
+	KERNEL_CFLAGS += CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_0FLASH=y
+endif
+ifneq ($(BOARD_USES_TOUCH_PALM),)
+	KERNEL_CFLAGS += CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_ENABLE_PALM=y
+endif
+
+ifneq ($(BOARD_USES_DOUBLE_TAP),)
+	KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_ENABLE_DOUBLE_TAP=y
+endif
+
+ifneq ($(BOARD_USES_HIMAX_MULTI_BIN),)
+	KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_ENABLE_MULTI_BIN=y
+endif
+
+ifeq ($(HIMAX_V2_MMI_HX83102D),true)
+	KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME_D=hx83102d
+endif
+
+ifeq ($(HIMAX_V2_MMI_HX83112F),true)
+	KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME=hx83112f
+endif
+
+ifneq ($(BOARD_USES_PANEL_NOTIFICATIONS),)
+	KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_PANEL_NOTIFICATIONS=y
+endif
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := himax_0flash_mmi.ko
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_PATH := $(HIMAX_MMI_MODULE_PATH)
+include $(DLKM_DIR)/AndroidKernelModule.mk
+
+include $(call first-makefiles-under,$(LOCAL_PATH))
--- a/drivers/input/touchscreen/himax_0flash_mmi/Kbuild
+++ b/drivers/input/touchscreen/himax_0flash_mmi/Kbuild
@ -0,0 +1,59 @@
+# add -Wall to try to catch everything we can.
+EXTRA_CFLAGS += -Wall
+EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG \
+		-DCONFIG_TOUCHSCREEN_HIMAX_INSPECT
+
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_INCELL
+EXTRA_CFLAGS += -DCONFIG_HMX_DB
+
+ifneq ($(filter hx83112f,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83112_MOD__
+	EXTRA_CFLAGS += -DHX_FIX_TOUCH_INFO
+	EXTRA_CFLAGS += -DHX_112F_SET
+# Fixed warning: variable length array used [-Wvla]
+	EXTRA_CFLAGS += -DFIX_WVLA
+endif
+
+ifneq ($(filter hx83112,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83112_MOD__
+endif
+
+ifneq ($(filter hx83102,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83102_MOD__
+endif
+
+ifneq ($(filter hx83102d,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME_D)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83102D_MOD__
+	EXTRA_CFLAGS += -DHX_CODE_OVERLAY
+endif
+
+ifneq ($(filter m y,$(CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_ENABLE_PALM)),)
+	EXTRA_CFLAGS += -DHIMAX_PALM_SENSOR_EN
+endif
+
+ifneq ($(filter m y,$(CONFIG_INPUT_HIMAX_V2_MMI_ENABLE_DOUBLE_TAP)),)
+	EXTRA_CFLAGS += -DHIMAX_V2_SENSOR_EN
+endif
+
+ifneq ($(filter m y,$(CONFIG_INPUT_HIMAX_V2_MMI_ENABLE_MULTI_BIN)),)
+	EXTRA_CFLAGS += -DHIMAX_V2_MULTI_BIN
+endif
+
+ifneq ($(filter m y,$(CONFIG_INPUT_HIMAX_PANEL_NOTIFICATIONS)),)
+	EXTRA_CFLAGS += -DHIMAX_CONFIG_PANEL_NOTIFICATIONS
+endif
+
+obj-m := himax_0flash_mmi.o
+
+ifneq ($(filter m y,$(CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_0FLASH)),)
+	himax_0flash_mmi-objs += himax_platform_QCT_SPI.o
+	EXTRA_CFLAGS += -D__HIMAX_PLATFORM_SPI__ \
+			-DHX_ZERO_FLASH
+endif
+
+himax_0flash_mmi-objs += himax_common.o
+himax_0flash_mmi-objs += himax_debug.o
+himax_0flash_mmi-objs += himax_ic_incell_core.o
+himax_0flash_mmi-objs += himax_inspection.o
--- a/drivers/input/touchscreen/himax_0flash_mmi/Makefile
+++ b/drivers/input/touchscreen/himax_0flash_mmi/Makefile
@ -0,0 +1,10 @@
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+
+all:
+	$(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS)
+
+modules_install:
+	$(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_common.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_common.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_common.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_common.h
@ -0,0 +1,628 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for common functions
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef HIMAX_COMMON_H
+#define HIMAX_COMMON_H
+
+#include <asm/segment.h>
+
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/async.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+#include <linux/input/mt.h>
+#include <linux/firmware.h>
+#include <linux/types.h>
+#include <linux/fs.h>
+#include <linux/buffer_head.h>
+#include <linux/pm_wakeup.h>
+#include <linux/seq_file.h>
+#include <linux/proc_fs.h>
+#include "himax_platform.h"
+#include <linux/kallsyms.h>
+#ifdef HIMAX_PALM_SENSOR_EN
+#include <linux/sensors.h>
+#define SENSOR_TYPE_MOTO_TOUCH_PALM    (SENSOR_TYPE_DEVICE_PRIVATE_BASE + 31)
+#endif
+#ifdef HIMAX_V2_SENSOR_EN
+#include <linux/sensors.h>
+#endif
+
+#if defined(CONFIG_DRM)
+	#include <linux/msm_drm_notify.h>
+#elif defined(CONFIG_FB)
+	#include <linux/notifier.h>
+	#include <linux/fb.h>
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
+	#include <linux/earlysuspend.h>
+#endif
+
+#ifdef HIMAX_CONFIG_PANEL_NOTIFICATIONS
+#include <linux/panel_notifier.h>
+#endif
+
+#ifdef CONFIG_OF
+	#include <linux/of_gpio.h>
+#endif
+
+#define HIMAX_DRIVER_VER "2.0.0.14_ABCD1234_01"
+
+#define FLASH_DUMP_FILE "/sdcard/HX_Flash_Dump.bin"
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
+	#define HX_TP_PROC_2T2R
+	/*#define HX_TP_SELF_TEST_DRIVER*/ /*if enable, selftest works in driver*/
+#endif
+
+#ifdef HIMAX_PALM_SENSOR_EN
+struct himax_sensor_platform_data {
+	struct input_dev *input_sensor_dev;
+	struct sensors_classdev ps_cdev;
+	int sensor_opened;
+	char sensor_data; /* 0 near, 1 far */
+	struct himax_ts_data *data;
+};
+
+enum palm_sensor_lazy_set {
+	PALM_SENSOR_LAZY_SET_NONE = 0,
+	PALM_SENSOR_LAZY_SET_ENABLE,
+	PALM_SENSOR_LAZY_SET_DISABLE,
+};
+#endif
+
+#ifdef HIMAX_V2_SENSOR_EN
+struct himax_tap_sensor_platform_data {
+	struct input_dev *input_sensor_dev;
+	struct sensors_classdev ps_cdev;
+	struct himax_ts_data *data;
+};
+#endif
+
+/*===========Himax Option function=============*/
+#define HX_RST_PIN_FUNC
+#define HX_RESUME_SEND_CMD
+#define HX_ESD_RECOVERY
+#define HX_TP_PROC_GUEST_INFO
+/*#define HX_SHARP_ENABLE_PON*/
+/*#define HX_NEW_EVENT_STACK_FORMAT*/
+/*#define HX_AUTO_UPDATE_FW*/
+#ifdef HIMAX_V2_SENSOR_EN
+#define HX_SMART_WAKEUP
+#else
+//#define HX_SMART_WAKEUP
+#endif
+/*#define HX_GESTURE_TRACK*/
+/*#define HX_HIGH_SENSE*/
+#ifdef HIMAX_PALM_SENSOR_EN
+#define HX_PALM_REPORT
+#else
+/*#define HX_PALM_REPORT*/
+#endif
+#define HX_USB_DETECT_GLOBAL
+/*#define HX_USB_DETECT_CALLBACK*/
+/*#define HX_PROTOCOL_A*/				/* for MTK special platform.If turning on,it will report to system by using specific format. */
+#define HX_RESUME_HW_RESET
+#define HX_PROTOCOL_B_3PA
+/*#define HX_FIX_TOUCH_INFO*/	/* if open, you need to change the touch info in the fix_touch_info*/
+/*#define HX_ZERO_FLASH*/
+#define HX_RESUME_SET_FW
+/*#if defined(HX_ZERO_FLASH)*/
+/*#define HX_CODE_OVERLAY*/
+/*#define HX_EDGE_LIMIT*/
+/*#endif*/
+/*#define HX_EN_DYNAMIC_NAME*/	/* Support dynamic load fw name ,default is close */
+/*#undef CONFIG_FB*/ /* Enable it if driver go into suspend/resume twice */
+/*#define HX_PEN_FUNC_EN*/
+
+/*#define HX_EN_SEL_BUTTON*/	/* Support Self Virtual key		,default is close*/
+/*#define HX_EN_MUT_BUTTON*/	/* Support Mutual Virtual Key	,default is close*/
+
+#if defined(HX_EN_SEL_BUTTON) || defined(HX_EN_MUT_BUTTON)
+	/*#define HX_PLATFOME_DEFINE_KEY*/		/* for specfic platform to set key(button) */
+#endif
+#ifdef HX_USB_DETECT_GLOBAL
+#include <linux/power_supply.h>
+#endif
+
+#if defined(HX_SMART_WAKEUP)
+/*#define HX_P_SENSOR*/
+#endif
+/*=============================================*/
+#define HX_SPI_MTK_MAX_WRITE_SZ	(256 - 4)
+
+#define HX_KEY_MAX_COUNT             4
+#define DEFAULT_RETRY_CNT            3
+
+#define HX_85XX_A_SERIES_PWON		"HX85xxA"
+#define HX_85XX_B_SERIES_PWON		"HX85xxB"
+#define HX_85XX_C_SERIES_PWON		"HX85xxC"
+#define HX_85XX_D_SERIES_PWON		"HX85xxD"
+#define HX_85XX_E_SERIES_PWON		"HX85xxE"
+#define HX_85XX_ES_SERIES_PWON		"HX85xxES"
+#define HX_85XX_F_SERIES_PWON		"HX85xxF"
+#define HX_85XX_H_SERIES_PWON		"HX85xxH"
+#define HX_83100A_SERIES_PWON		"HX83100A"
+#define HX_83102A_SERIES_PWON		"HX83102A"
+#define HX_83102B_SERIES_PWON		"HX83102B"
+#define HX_83102D_SERIES_PWON		"HX83102D"
+#define HX_83102E_SERIES_PWON		"HX83102E"
+#define HX_83103A_SERIES_PWON		"HX83103A"
+#define HX_83106A_SERIES_PWON		"HX83106A"
+#define HX_83110A_SERIES_PWON		"HX83110A"
+#define HX_83110B_SERIES_PWON		"HX83110B"
+#define HX_83111B_SERIES_PWON		"HX83111B"
+#define HX_83112A_SERIES_PWON		"HX83112A"
+#define HX_83112B_SERIES_PWON		"HX83112B"
+#define HX_83113A_SERIES_PWON		"HX83113A"
+#define HX_83112D_SERIES_PWON		"HX83112D"
+#define HX_83112E_SERIES_PWON		"HX83112E"
+#define HX_83191A_SERIES_PWON		"HX83191A"
+#define HX_83112F_SERIES_PWON		"HX83112f"
+
+#define HX_TP_BIN_CHECKSUM_SW		1
+#define HX_TP_BIN_CHECKSUM_HW		2
+#define HX_TP_BIN_CHECKSUM_CRC		3
+
+#define SHIFTBITS 5
+
+#define FW_SIZE_32k		32768
+#define FW_SIZE_60k		61440
+#define FW_SIZE_64k		65536
+#define FW_SIZE_124k	126976
+#define FW_SIZE_128k	131072
+
+#define NO_ERR 0
+#define READY_TO_SERVE 1
+#define WORK_OUT	2
+#define I2C_FAIL -1
+#define HX_INIT_FAIL -1
+#define MEM_ALLOC_FAIL -2
+#define CHECKSUM_FAIL -3
+#define GESTURE_DETECT_FAIL -4
+#define INPUT_REGISTER_FAIL -5
+#define FW_NOT_READY -6
+#define LENGTH_FAIL -7
+#define OPEN_FILE_FAIL -8
+#define ERR_WORK_OUT	-10
+#define ERR_STS_WRONG	-11
+#define ERR_TEST_FAIL	-12
+#define HW_CRC_FAIL 1
+
+#define HX_FINGER_ON	1
+#define HX_FINGER_LEAVE	2
+
+#if defined(HX_PALM_REPORT)
+#define PALM_REPORT 1
+#define PALM_LEAVE_REPORT 2
+#define NOT_REPORT -1
+#endif
+
+#if defined(HX_PEN_FUNC_EN)
+#define PEN_INFO_SZ 12
+#endif
+
+#if defined(__EMBEDDED_FW__)
+extern const uint8_t _binary___Himax_firmware_bin_start[];
+extern const uint8_t _binary___Himax_firmware_bin_end[];
+extern struct firmware g_embedded_fw;
+#endif
+
+enum HX_TS_PATH {
+	HX_REPORT_COORD = 1,
+	HX_REPORT_SMWP_EVENT,
+	HX_REPORT_COORD_RAWDATA,
+};
+
+enum HX_TS_STATUS {
+	HX_TS_GET_DATA_FAIL = -4,
+	HX_ESD_EVENT,
+	HX_CHKSUM_FAIL,
+	HX_PATH_FAIL,
+	HX_TS_NORMAL_END = 0,
+	HX_ESD_REC_OK,
+	HX_READY_SERVE,
+	HX_REPORT_DATA,
+	HX_ESD_WARNING,
+	HX_IC_RUNNING,
+	HX_ZERO_EVENT_COUNT,
+	HX_RST_OK,
+};
+
+enum cell_type {
+	CHIP_IS_ON_CELL,
+	CHIP_IS_IN_CELL
+};
+#ifdef HX_FIX_TOUCH_INFO
+#ifdef HX_112F_SET
+enum fix_touch_info {
+	FIX_HX_RX_NUM = 36,
+	FIX_HX_TX_NUM = 16,
+	FIX_HX_BT_NUM = 0,
+	FIX_HX_X_RES = 1080,
+	FIX_HX_Y_RES = 2520,
+	FIX_HX_MAX_PT = 10,
+	FIX_HX_XY_REVERSE = false,
+	FIX_HX_INT_IS_EDGE = true,
+#ifdef HX_TP_PROC_2T2R
+	FIX_HX_RX_NUM_2 = 36,
+	FIX_HX_TX_NUM_2 = 16,
+#endif
+};
+#else
+enum fix_touch_info {
+	FIX_HX_RX_NUM = 36,
+	FIX_HX_TX_NUM = 18,
+	FIX_HX_BT_NUM = 0,
+	FIX_HX_X_RES = 1080,
+	FIX_HX_Y_RES = 2280,
+	FIX_HX_MAX_PT = 10,
+	FIX_HX_XY_REVERSE = false,
+	FIX_HX_INT_IS_EDGE = true,
+#ifdef HX_TP_PROC_2T2R
+	FIX_HX_RX_NUM_2 = 36,
+	FIX_HX_TX_NUM_2 = 18,
+#endif
+};
+#endif
+#endif
+
+#ifdef HX_ZERO_FLASH
+	#define HX_SPI_OPERATION
+	#define HX_0F_DEBUG
+#endif
+struct himax_ic_data {
+	int vendor_fw_ver;
+	int vendor_config_ver;
+	int vendor_touch_cfg_ver;
+	int vendor_display_cfg_ver;
+	int vendor_cid_maj_ver;
+	int vendor_cid_min_ver;
+	int vendor_panel_ver;
+	int vendor_sensor_id;
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#ifdef HX_EN_DYNAMIC_NAME
+	int vendor_ic_ver;
+	int vendor_old_ic_ver;
+	uint8_t vendor_semifac;
+#endif
+#endif
+	uint8_t vendor_cus_info[12];
+	uint8_t vendor_proj_info[12];
+	uint8_t vendor_ic_id[13];
+	int		HX_RX_NUM;
+	int		HX_TX_NUM;
+	int		HX_BT_NUM;
+	int		HX_X_RES;
+	int		HX_Y_RES;
+	int		HX_MAX_PT;
+	bool	HX_XY_REVERSE;
+	bool	HX_INT_IS_EDGE;
+#ifdef HX_TP_PROC_2T2R
+	int HX_RX_NUM_2;
+	int HX_TX_NUM_2;
+#endif
+};
+
+struct himax_virtual_key {
+	int index;
+	int keycode;
+	int x_range_min;
+	int x_range_max;
+	int y_range_min;
+	int y_range_max;
+};
+
+struct himax_target_report_data {
+	int *x;
+	int *y;
+	int *w;
+	int *finger_id;
+	int finger_on;
+	int finger_num;
+#ifdef HX_PLATFORM_DEFINE_KEY
+	int key_size;
+	int *key_x;
+	int *key_y;
+	int *key_w;
+#endif
+#ifdef HX_SMART_WAKEUP
+	int SMWP_event_chk;
+#endif
+#if defined(HX_PEN_FUNC_EN)
+	int32_t *p_x;
+	int32_t *p_y;
+	int32_t *p_w;
+	int32_t *pen_id;
+	uint32_t *p_hover;
+	int32_t *p_tilt_x;
+	uint32_t *p_btn;
+	uint32_t *p_btn2;
+	int32_t *p_tilt_y;
+	uint32_t *p_on;
+#endif
+	int ig_count;
+
+};
+
+struct himax_report_data {
+	int touch_all_size;
+	int raw_cnt_max;
+	int raw_cnt_rmd;
+	int touch_info_size;
+	uint8_t	finger_num;
+	uint8_t	finger_on;
+	uint8_t *hx_coord_buf;
+	uint8_t hx_state_info[2];
+#if defined(HX_SMART_WAKEUP)
+	int event_size;
+	uint8_t *hx_event_buf;
+#endif
+
+	int rawdata_size;
+	uint8_t diag_cmd;
+	uint8_t *hx_rawdata_buf;
+	uint8_t rawdata_frame_size;
+};
+
+struct himax_ts_data {
+	bool initialized;
+	bool suspended;
+	atomic_t suspend_mode;
+	struct mutex suspend_resume_mutex;
+	uint8_t x_channel;
+	uint8_t y_channel;
+	uint8_t useScreenRes;
+	uint8_t diag_cmd;
+	char chip_name[30];
+	uint8_t chip_cell_type;
+
+	uint8_t protocol_type;
+	uint8_t first_pressed;
+	uint8_t coord_data_size;
+	uint8_t area_data_size;
+	uint8_t coordInfoSize;
+	uint8_t raw_data_frame_size;
+	uint8_t raw_data_nframes;
+	uint8_t nFinger_support;
+	uint8_t irq_enabled;
+	uint8_t diag_self[50];
+
+	uint16_t finger_pressed;
+	uint16_t last_slot;
+	uint16_t pre_finger_mask;
+	uint16_t old_finger;
+	int hx_point_num;
+
+
+	uint32_t debug_log_level;
+	uint32_t widthFactor;
+	uint32_t heightFactor;
+	uint32_t tw_x_min;
+	uint32_t tw_x_max;
+	uint32_t tw_y_min;
+	uint32_t tw_y_max;
+	uint32_t pl_x_min;
+	uint32_t pl_x_max;
+	uint32_t pl_y_min;
+	uint32_t pl_y_max;
+
+	int rst_gpio;
+	int use_irq;
+	int (*power)(int on);
+	int pre_finger_data[10][2];
+	bool vdd_1v8_always_on;
+
+	struct device *dev;
+	struct workqueue_struct *himax_wq;
+	struct work_struct work;
+	struct input_dev *input_dev;
+#if defined(HX_PEN_FUNC_EN)
+	struct input_dev *hx_pen_dev;
+#endif
+	struct hrtimer timer;
+	struct i2c_client *client;
+	struct himax_i2c_platform_data *pdata;
+	struct himax_virtual_key *button;
+	struct mutex rw_lock;
+
+/******* SPI-start *******/
+	struct mutex	spi_lock;
+	struct spi_device	*spi;
+	int hx_irq;
+	uint8_t *xfer_buff;
+/******* SPI-end *******/
+
+	int in_self_test;
+	int suspend_resume_done;
+	int bus_speed;
+
+#if defined(CONFIG_FB) || defined(CONFIG_DRM)
+	struct notifier_block fb_notif;
+	struct workqueue_struct *himax_att_wq;
+	struct delayed_work work_att;
+#elif defined(CONFIG_HAS_EARLYSUSPEND)
+	struct early_suspend early_suspend;
+#endif
+
+#ifdef HIMAX_CONFIG_PANEL_NOTIFICATIONS
+	struct notifier_block panel_notif;
+	struct workqueue_struct *himax_panel_wq;
+	struct delayed_work work_panel;
+#endif
+	struct workqueue_struct			*flash_wq;
+	struct work_struct				flash_work;
+
+#ifdef HX_AUTO_UPDATE_FW
+	struct workqueue_struct *himax_update_wq;
+	struct delayed_work work_update;
+#endif
+
+#ifdef HX_ZERO_FLASH
+	struct workqueue_struct *himax_0f_update_wq;
+	struct delayed_work work_0f_update;
+#endif
+#ifdef HX_RESUME_SET_FW
+	struct workqueue_struct *ts_int_workqueue;
+#if defined(__HIMAX_HX83102D_MOD__)
+	struct delayed_work ts_int_work;
+#else
+	struct work_struct ts_int_work;
+#endif
+#endif
+
+	struct workqueue_struct *himax_diag_wq;
+	struct delayed_work himax_diag_delay_wrok;
+
+#if defined (HX_SMART_WAKEUP) || defined (HX_CODE_OVERLAY)
+	uint8_t SMWP_enable;
+	uint8_t gesture_cust_en[26];
+	struct wakeup_source ts_SMWP_wake_lock;
+#ifdef HX_P_SENSOR
+	bool psensor_flag;
+#endif
+#endif
+
+#ifdef HX_EDGE_LIMIT
+	uint8_t edge_limit_enable;
+	uint8_t edge_limit_en[8];
+#endif
+
+#ifdef HX_HIGH_SENSE
+	uint8_t HSEN_enable;
+#endif
+
+#if defined(HX_USB_DETECT_CALLBACK) || defined(HX_USB_DETECT_GLOBAL)
+	uint8_t usb_connected;
+	uint8_t *cable_config;
+	struct notifier_block charger_notif;
+#endif
+
+#ifdef HX_TP_PROC_GUEST_INFO
+	struct workqueue_struct		*guest_info_wq;
+	struct work_struct			guest_info_work;
+#endif
+
+#ifdef HIMAX_PALM_SENSOR_EN
+	bool palm_detection_enabled;
+	enum palm_sensor_lazy_set palm_detection_lazy_set;
+	struct himax_sensor_platform_data *palm_sensor_pdata;
+	struct timer_list palm_release_fimer;
+	unsigned int palm_release_delay_ms;
+#ifdef CONFIG_HAS_WAKELOCK
+	struct wake_lock palm_gesture_wakelock;
+#else
+	struct wakeup_source palm_gesture_wakelock;
+#endif
+#ifdef CONFIG_HAS_WAKELOCK
+	struct wake_lock palm_gesture_read_wakelock;
+#else
+	struct wakeup_source palm_gesture_read_wakelock;
+#endif
+#endif
+
+#ifdef HIMAX_V2_SENSOR_EN
+	struct himax_tap_sensor_platform_data *sensor_pdata;
+#endif
+
+};
+
+struct himax_debug {
+	bool flash_dump_going;
+	void (*fp_ts_dbg_func)(struct himax_ts_data *ts, int start);
+	int (*fp_set_diag_cmd)(struct himax_ic_data *ic_data, struct himax_report_data *hx_touch_data);
+};
+
+enum input_protocol_type {
+	PROTOCOL_TYPE_A	= 0x00,
+	PROTOCOL_TYPE_B	= 0x01,
+};
+
+#ifdef HX_HIGH_SENSE
+	void himax_set_HSEN_func(uint8_t HSEN_enable);
+#endif
+
+#ifdef HX_SMART_WAKEUP
+void himax_set_SMWP_func(uint8_t SMWP_enable);
+
+#define GEST_PTLG_ID_LEN	(4)
+#define GEST_PTLG_HDR_LEN	(4)
+#define GEST_PTLG_HDR_ID1	(0xCC)
+#define GEST_PTLG_HDR_ID2	(0x44)
+#define GEST_PT_MAX_NUM		(128)
+
+extern uint8_t *wake_event_buffer;
+#endif
+
+#ifdef HIMAX_CONFIG_PANEL_NOTIFICATIONS
+#define register_panel_notifier panel_register_notifier
+#define unregister_panel_notifier panel_unregister_notifier
+enum touch_state {
+	TOUCH_DEEP_SLEEP_STATE = 0,
+	TOUCH_LOW_POWER_STATE,
+};
+#else
+#define register_panel_notifier(...) rc
+#define unregister_panel_notifier(...) rc
+#endif
+
+extern int irq_enable_count;
+extern int g_mmi_refcnt;
+extern int *g_inspt_crtra_flag;
+extern uint32_t g_hx_chip_inited;
+/*void himax_HW_reset(uint8_t loadconfig,uint8_t int_off);*/
+
+int himax_chip_common_suspend(struct himax_ts_data *ts);
+int himax_chip_common_resume(struct himax_ts_data *ts);
+
+extern struct filename* (*kp_getname_kernel)(const char *filename);
+extern struct file * (*kp_file_open_name)(struct filename *name, int flags, umode_t mode);
+
+struct himax_core_fp;
+extern struct himax_core_fp g_core_fp;
+extern struct himax_ts_data *private_ts;
+extern struct himax_ic_data *ic_data;
+extern struct device *g_device;
+
+#ifdef CONFIG_TOUCHSCREEN_HIMAX_DEBUG
+	int himax_debug_init(void);
+	int himax_debug_remove(void);
+#endif
+
+#if defined(HX_PLATFOME_DEFINE_KEY)
+	void	himax_platform_key(void);
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_HIMAX_INSPECT
+	extern char *g_rslt_data;
+	extern void (*fp_himax_self_test_init)(void);
+#endif
+
+int himax_parse_dt(struct himax_ts_data *ts, struct himax_i2c_platform_data *pdata);
+int himax_report_data(struct himax_ts_data *ts, int ts_path, int ts_status);
+
+int himax_report_data_init(void);
+
+int himax_dev_set(struct himax_ts_data *ts);
+int himax_input_register_device(struct input_dev *input_dev);
+
+#endif
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_debug.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_debug.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_debug.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_debug.h
@ -0,0 +1,149 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for debug nodes
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef H_HIMAX_DEBUG
+#define H_HIMAX_DEBUG
+
+#include "himax_platform.h"
+#include "himax_common.h"
+
+
+#ifdef HX_ESD_RECOVERY
+	extern	u8	HX_ESD_RESET_ACTIVATE;
+	extern	int	hx_EB_event_flag;
+	extern	int	hx_EC_event_flag;
+	extern	int	hx_ED_event_flag;
+#endif
+
+#define HIMAX_PROC_VENDOR_FILE		"vendor"
+extern struct proc_dir_entry *himax_proc_vendor_file;
+
+#define HIMAX_PROC_PEN_POS_FILE		"pen_pos"
+
+int himax_touch_proc_init(void);
+void himax_touch_proc_deinit(void);
+extern int himax_int_en_set(void);
+
+extern uint8_t byte_length;
+extern uint8_t register_command[4];
+extern uint8_t cfg_flag;
+
+#define HIMAX_PROC_DIAG_FOLDER "diag"
+struct proc_dir_entry *himax_proc_diag_dir;
+#define HIMAX_PROC_STACK_FILE "stack"
+extern struct proc_dir_entry *himax_proc_stack_file;
+#define HIMAX_PROC_IIR_FILE "iir_s"
+extern struct proc_dir_entry *himax_proc_iir_file;
+#define HIMAX_PROC_DC_FILE "dc_s"
+extern struct proc_dir_entry *himax_proc_dc_file;
+#define HIMAX_PROC_BANK_FILE "bank_s"
+extern struct proc_dir_entry *himax_proc_bank_file;
+
+#ifdef HX_TP_PROC_2T2R
+	extern uint32_t *diag_mutual_2;
+
+	int32_t	*getMutualBuffer_2(void);
+	void	setMutualBuffer_2(uint8_t x_num, uint8_t y_num);
+#endif
+extern int32_t *diag_mutual;
+extern int32_t *diag_mutual_new;
+extern int32_t *diag_mutual_old;
+extern uint8_t diag_max_cnt;
+extern uint8_t hx_state_info[2];
+extern uint8_t diag_coor[128];
+extern int32_t diag_self[100];
+extern int32_t diag_self_new[100];
+extern int32_t diag_self_old[100];
+int32_t *getMutualBuffer(void);
+int32_t *getMutualNewBuffer(void);
+int32_t *getMutualOldBuffer(void);
+int32_t *getSelfBuffer(void);
+int32_t *getSelfNewBuffer(void);
+int32_t *getSelfOldBuffer(void);
+void	setMutualBuffer(uint8_t x_num, uint8_t y_num);
+void	setMutualNewBuffer(uint8_t x_num, uint8_t y_num);
+void	setMutualOldBuffer(uint8_t x_num, uint8_t y_num);
+uint8_t process_type;
+uint8_t mode_flag;
+uint8_t overflow;
+
+#define HIMAX_PROC_DEBUG_FILE	"debug"
+extern struct proc_dir_entry *himax_proc_debug_file;
+extern bool	fw_update_complete;
+extern int handshaking_result;
+extern unsigned char debug_level_cmd;
+extern uint8_t cmd_set[8];
+extern uint8_t mutual_set_flag;
+
+#define HIMAX_PROC_FLASH_DUMP_FILE	"flash_dump"
+extern struct proc_dir_entry *himax_proc_flash_dump_file;
+extern int Flash_Size;
+extern uint8_t *flash_buffer;
+extern uint8_t g_flash_cmd;
+extern uint8_t g_flash_progress;
+extern bool g_flash_dump_rst; /*Fail = 0, Pass = 1*/
+void setFlashBuffer(void);
+
+enum flash_dump_prog {
+	START,
+	ONGOING,
+	FINISHED,
+};
+
+extern uint32_t **raw_data_array;
+extern uint8_t X_NUM4;
+extern uint8_t Y_NUM;
+extern uint8_t sel_type;
+
+/* Moved from debug.c */
+extern struct himax_debug *debug_data;
+extern unsigned char    IC_CHECKSUM;
+extern int i2c_error_count;
+extern struct proc_dir_entry *himax_touch_proc_dir;
+
+#ifdef HX_TP_PROC_GUEST_INFO
+extern struct hx_guest_info *g_guest_info_data;
+extern char *g_guest_info_item[];
+#endif
+
+extern int himax_input_register(struct himax_ts_data *ts);
+#ifdef HX_TP_PROC_2T2R
+	extern bool Is_2T2R;
+#endif
+
+#ifdef HX_RST_PIN_FUNC
+	extern void himax_ic_reset(uint8_t loadconfig, uint8_t int_off);
+#endif
+
+#if defined(HX_ZERO_FLASH)
+extern char *i_CTPM_firmware_name;
+#endif
+
+extern uint8_t HX_PROC_SEND_FLAG;
+extern struct himax_target_report_data *g_target_report_data;
+extern struct himax_report_data *hx_touch_data;
+extern int g_ts_dbg;
+
+/* Moved from debug.c end */
+#define BUF_SIZE 1024
+#define CMD_NUM 15
+char *dbg_cmd_str[] = {"crc_test", "fw_debug", "attn", "layout", "dd_debug",
+	"esd_cnt", "senseonoff", "debug_level", "guest_info", "int_en",
+	"register",	"reset", "diag_arr", "diag", NULL};
+int dbg_cmd_flag;
+char *dbg_cmd_par;
+ssize_t (*dbg_func_ptr_r[CMD_NUM])(char *buf, size_t len);
+ssize_t (*dbg_func_ptr_w[CMD_NUM])(char *buf, size_t len);
+#endif
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_ic_core.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_ic_core.h
@ -0,0 +1,987 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for ic core functions
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef __HIMAX_IC_CORE_H__
+#define __HIMAX_IC_CORE_H__
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include <linux/slab.h>
+
+#define DATA_LEN_8     8
+#define DATA_LEN_4     4
+#define ADDR_LEN_4     4
+#define FLASH_RW_MAX_LEN      256
+#define FLASH_WRITE_BURST_SZ  8
+#define PROGRAM_SZ            48
+#define MAX_I2C_TRANS_SZ      128
+#define HIMAX_REG_RETRY_TIMES 5
+#define FW_BIN_16K_SZ         0x4000
+#define HIMAX_TOUCH_DATA_SIZE 128
+#define MASK_BIT_0 0x01
+#define MASK_BIT_1 0x02
+#define MASK_BIT_2 0x04
+#define PACKET_MAX_SZ 4096
+
+#define FW_SECTOR_PER_BLOCK			8
+#define FW_PAGE_PER_SECTOR			64
+#define FW_PAGE_SEZE				128
+#define HX256B	0x100
+#define HX4K	0x1000
+#define HX_32K_SZ 0x8000
+#define HX_40K_SZ 0xA000
+#define HX_48K_SZ 0xC000
+#define HX1K 0x400
+#define HX64K	0x10000
+#define HX124K	0x1f000
+#define HX4000K	0x1000000
+
+#define HX_NORMAL_MODE		1
+#define HX_SORTING_MODE		2
+#define HX_CHANGE_MODE_FAIL	(-1)
+#define HX_RW_REG_FAIL			(-1)
+#define HX_DRIVER_MAX_IC_NUM 12
+
+#if defined(__HIMAX_HX852xG_MOD__)
+#define HX_MOD_KSYM_HX852xG            HX_MOD_KSYM_HX852xG
+#endif
+
+#if defined(__HIMAX_HX852xH_MOD__)
+#define HX_MOD_KSYM_HX852xH            HX_MOD_KSYM_HX852xH
+#endif
+
+#if defined(__HIMAX_HX83102_MOD__)
+#define HX_MOD_KSYM_HX83102            HX_MOD_KSYM_HX83102
+#endif
+
+#if defined(__HIMAX_HX83102D_MOD__)
+#define HX_MOD_KSYM_HX83102            HX_MOD_KSYM_HX83102
+#define HX83102D
+#endif
+
+#if defined(__HIMAX_HX83103_MOD__)
+#define HX_MOD_KSYM_HX83103            HX_MOD_KSYM_HX83103
+#endif
+
+#if defined(__HIMAX_HX83106_MOD__)
+#define HX_MOD_KSYM_HX83106            HX_MOD_KSYM_HX83106
+#endif
+
+#if defined(__HIMAX_HX83111_MOD__)
+#define HX_MOD_KSYM_HX83111            HX_MOD_KSYM_HX83111
+#endif
+
+#if defined(__HIMAX_HX83112_MOD__)
+#define HX_MOD_KSYM_HX83112            HX_MOD_KSYM_HX83112
+#endif
+
+#if defined(__HIMAX_HX83191_MOD__)
+#define HX_MOD_KSYM_HX83191            HX_MOD_KSYM_HX83191
+#endif
+
+#if defined(__HIMAX_HX83113_MOD__)
+#define HX_MOD_KSYM_HX83113            HX_MOD_KSYM_HX83113
+#endif
+
+#define CORE_INIT
+#define CORE_IC
+#define CORE_FW
+#define CORE_FLASH
+#define CORE_SRAM
+#define CORE_DRIVER
+
+#define HX_0F_DEBUG
+
+#ifdef CONFIG_TOUCHSCREEN_HIMAX_INCELL
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+	extern char *i_CTPM_firmware_name;
+#endif
+
+#ifdef HX_ZERO_FLASH
+	extern int g_f_0f_updat;
+#endif
+
+#ifdef HX_TP_PROC_GUEST_INFO
+	extern struct hx_guest_info *g_guest_info_data;
+#endif
+
+void himax_mcu_in_cmd_struct_free(void);
+
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_HIMAX_ONCELL
+
+void himax_mcu_on_cmd_struct_free(void);
+
+#endif
+
+#ifdef HX_AUTO_UPDATE_FW
+extern int g_i_FW_VER;
+extern int g_i_CFG_VER;
+extern int g_i_CID_MAJ;
+extern int g_i_CID_MIN;
+extern unsigned char *i_CTPM_FW;
+#endif
+
+extern unsigned long FW_VER_MAJ_FLASH_ADDR;
+extern unsigned long FW_VER_MIN_FLASH_ADDR;
+extern unsigned long CFG_VER_MAJ_FLASH_ADDR;
+extern unsigned long CFG_VER_MIN_FLASH_ADDR;
+extern unsigned long CID_VER_MAJ_FLASH_ADDR;
+extern unsigned long CID_VER_MIN_FLASH_ADDR;
+
+extern unsigned long FW_VER_MAJ_FLASH_LENG;
+extern unsigned long FW_VER_MIN_FLASH_LENG;
+extern unsigned long CFG_VER_MAJ_FLASH_LENG;
+extern unsigned long CFG_VER_MIN_FLASH_LENG;
+extern unsigned long CID_VER_MAJ_FLASH_LENG;
+extern unsigned long CID_VER_MIN_FLASH_LENG;
+
+extern unsigned char IC_CHECKSUM;
+#ifdef HX_ESD_RECOVERY
+extern int g_zero_event_count;
+#endif
+
+#ifdef HX_RST_PIN_FUNC
+extern u8 HX_HW_RESET_ACTIVATE;
+void himax_rst_gpio_set(int pinnum, uint8_t value);
+#endif
+
+#if defined(HX_USB_DETECT_GLOBAL)
+void himax_cable_detect_func(bool force_renew);
+#endif
+
+int himax_report_data_init(void);
+extern int i2c_error_count;
+
+#ifdef HX_ESD_RECOVERY
+	extern u8 HX_ESD_RESET_ACTIVATE;
+#endif
+
+#ifdef CORE_INIT
+	int himax_mcu_in_cmd_struct_init(void);
+	void himax_in_parse_assign_cmd(uint32_t addr, uint8_t *cmd, int len);
+	void himax_mcu_in_cmd_init(void);
+
+	int himax_mcu_on_cmd_struct_init(void);
+	void himax_on_parse_assign_cmd(uint32_t addr, uint8_t *cmd, int len);
+	void himax_mcu_on_cmd_init(void);
+
+	extern void (*himax_mcu_cmd_struct_free)(void);
+#endif
+
+#ifdef HX_TP_PROC_GUEST_INFO
+#define HX_GUEST_INFO_SIZE	10
+#define HX_GUEST_INFO_LEN_SIZE	4
+#define HX_GUEST_INFO_ID_SIZE	4
+
+struct hx_guest_info {
+	int g_guest_info_ongoing; /* 0 stop, 1 ongoing */
+	uint8_t g_guest_str[10][128];
+	uint8_t g_guest_str_in_format[10][128];
+	uint8_t g_guest_data_type[10];
+	int g_guest_data_len[10];
+	int g_guest_info_type;
+};
+
+#endif
+
+#if defined(CORE_IC)
+	#define ic_adr_ahb_addr_byte_0							0x00
+	#define ic_adr_ahb_rdata_byte_0							0x08
+	#define ic_adr_ahb_access_direction						0x0c
+	#define ic_adr_conti									0x13
+	#define ic_adr_incr4									0x0D
+	#define ic_adr_i2c_psw_lb								0x31
+	#define ic_adr_i2c_psw_ub								0x32
+	#define ic_cmd_ahb_access_direction_read				0x00
+	#define ic_cmd_conti									0x31
+	#define ic_cmd_incr4									0x10
+	#define ic_cmd_i2c_psw_lb								0x27
+	#define ic_cmd_i2c_psw_ub								0x95
+	#define ic_adr_tcon_on_rst								0x80020020
+	#define ic_addr_adc_on_rst								0x80020094
+	#define ic_adr_psl										0x900000A0
+	#define ic_adr_cs_central_state							0x900000A8
+	#define ic_cmd_rst										0x00000000
+	#define ic_adr_osc_en 0x900880A8
+	#define ic_adr_osc_pw 0x900880E0
+
+	#define on_ic_adr_ahb_addr_byte_0						0x00
+	#define on_ic_adr_ahb_rdata_byte_0						0x08
+	#define on_ic_adr_ahb_access_direction					0x0c
+	#define on_ic_adr_conti									0x13
+	#define on_ic_adr_incr4									0x0D
+	#define on_ic_cmd_ahb_access_direction_read				0x00
+	#define on_ic_cmd_conti									0x31
+	#define on_ic_cmd_incr4									0x10
+	#define on_ic_adr_mcu_ctrl								0x82
+	#define on_ic_cmd_mcu_on								0x25
+	#define on_ic_cmd_mcu_off								0xDA
+	#define on_ic_adr_sleep_ctrl							0x99
+	#define on_ic_cmd_sleep_in								0x80
+	#define on_ic_adr_tcon_ctrl								0x80020000
+	#define on_ic_cmd_tcon_on								0x00000000
+	#define on_ic_adr_wdg_ctrl								0x9000800C
+	#define on_ic_cmd_wdg_psw								0x0000AC53
+	#define on_ic_adr_wdg_cnt_ctrl							0x90008010
+	#define on_ic_cmd_wdg_cnt_clr							0x000035CA
+#endif
+
+#if defined(CORE_FW)
+	#define fw_addr_system_reset							0x90000018
+	#define fw_addr_safe_mode_release_pw					0x90000098
+	#define fw_addr_ctrl_fw									0x9000005c
+	#define fw_addr_flag_reset_event						0x900000e4
+	#define fw_addr_hsen_enable								0x10007F14
+	#define fw_addr_smwp_enable								0x10007F10
+	#define fw_usb_detect_addr								0x10007F38
+	#define fw_addr_program_reload_from						0x00000000
+	#define fw_addr_program_reload_to						0x08000000
+	#define fw_addr_program_reload_page_write				0x0000fb00
+	#define fw_addr_raw_out_sel								0x800204b4
+	#define fw_addr_reload_status							0x80050000
+	#define fw_addr_reload_crc32_result						0x80050018
+	#define fw_addr_reload_addr_from						0x80050020
+	#define fw_addr_reload_addr_cmd_beat					0x80050028
+	#define fw_data_system_reset							0x00000055
+	#define fw_data_safe_mode_release_pw_active				0x00000053
+	#define fw_data_safe_mode_release_pw_reset				0x00000000
+	#define fw_data_clear									0x00000000
+	#define fw_data_fw_stop									0x000000A5
+	#define fw_data_program_reload_start					0x0A3C3000
+	#define fw_data_program_reload_compare					0x04663000
+	#define fw_data_program_reload_break					0x15E75678
+	#define fw_addr_selftest_addr_en						0x10007F18
+	#define fw_addr_selftest_result_addr					0x10007f24
+	#define fw_data_selftest_request						0x00006AA6
+	#define fw_addr_criteria_addr							0x10007f1c
+	#define fw_data_criteria_aa_top							0x64
+	#define fw_data_criteria_aa_bot							0x00
+	#define fw_data_criteria_key_top						0x64
+	#define fw_data_criteria_key_bot						0x00
+	#define fw_data_criteria_avg_top						0x64
+	#define fw_data_criteria_avg_bot						0x00
+	#define fw_addr_set_frame_addr							0x10007294
+	#define fw_data_set_frame								0x0000000A
+	#define fw_data_selftest_ack_hb							0xa6
+	#define fw_data_selftest_ack_lb							0x6a
+	#define fw_data_selftest_pass							0xaa
+	#define fw_data_normal_cmd								0x00
+	#define fw_data_normal_status							0x99
+	#define fw_data_sorting_cmd								0xaa
+	#define fw_data_sorting_status							0xcc
+	#define fw_data_idle_dis_pwd							0x17
+	#define fw_data_idle_en_pwd								0x1f
+	#define fw_addr_sorting_mode_en							0x10007f04
+	#define fw_addr_max_dc									0x10007fc8
+	#define fw_addr_fw_mode_status							0x10007088
+	#define fw_addr_icid_addr								0x900000d0
+	#define fw_addr_trigger_addr							0x10007088
+	#define fw_addr_fw_ver_addr								0x10007004
+	#define fw_addr_fw_cfg_addr								0x10007084
+	#define fw_addr_fw_vendor_addr							0x10007000
+	#define fw_addr_cus_info								0x10007008
+	#define fw_addr_proj_info								0x10007014
+	#define fw_addr_fw_state_addr							0x900000f8
+	#define fw_addr_fw_dbg_msg_addr							0x10007f40
+	#define fw_addr_chk_fw_status							0x900000a8
+	#define fw_addr_dd_handshak_addr						0x900000fc
+	#define fw_addr_dd_data_addr							0x10007f80
+	#define fw_data_dd_request								0xaa
+	#define fw_data_dd_ack									0xbb
+	#define fw_data_rawdata_ready_hb						0xa3
+	#define fw_data_rawdata_ready_lb						0x3a
+	#define fw_addr_ahb_addr								0x11
+	#define fw_data_ahb_dis									0x00
+	#define fw_data_ahb_en									0x01
+	#define fw_addr_event_addr								0x30
+	#define fw_func_handshaking_pwd							0xA55AA55A
+	#define fw_func_handshaking_end							0x77887788
+	#define fw_addr_ulpm_33									0x33
+	#define fw_addr_ulpm_34									0x34
+	#define fw_data_ulpm_11									0x11
+	#define fw_data_ulpm_22									0x22
+	#define fw_data_ulpm_33									0x33
+	#define fw_data_ulpm_aa									0xAA
+
+	#define fw_func_edge_portrait_pwd			 			0xA55AA55A
+	#define fw_func_edge_lsp_left_pwd			 			0xA11AA11A
+	#define fw_func_edge_lsp_right_pwd			 			0xA33AA33A
+
+	#define on_fw_addr_smwp_enable							0xA2
+	#define on_fw_usb_detect_addr							0xA4
+	#define on_fw_addr_program_reload_from					0x00000000
+	#define on_fw_addr_raw_out_sel							0x98
+	#define on_fw_addr_flash_checksum						0x80000044
+	#define on_fw_data_flash_checksum						0x00000491
+	#define on_fw_addr_crc_value							0x80000050
+	#define on_fw_data_safe_mode_release_pw_active			0x00000053
+	#define on_fw_data_safe_mode_release_pw_reset			0x00000000
+	#define on_fw_addr_criteria_addr						0x9A
+	#define on_fw_data_selftest_pass						0xaa
+	#define on_fw_addr_reK_crtl								0x8000000C
+	#define on_fw_data_reK_en								0x02
+	#define on_fw_data_reK_dis								0xFD
+	#define on_fw_data_rst_init								0xF0
+	#define on_fw_data_dc_set								0x02
+	#define on_fw_data_bank_set								0x03
+	#define on_fw_addr_selftest_addr_en						0x98
+	#define on_fw_addr_selftest_result_addr					0x9B
+	#define on_fw_data_selftest_request						0x06
+	#define on_fw_data_thx_avg_mul_dc_lsb					0x22
+	#define on_fw_data_thx_avg_mul_dc_msb					0x0B
+	#define on_fw_data_thx_mul_dc_up_low_bud				0x64
+	#define on_fw_data_thx_avg_slf_dc_lsb					0x14
+	#define on_fw_data_thx_avg_slf_dc_msb					0x05
+	#define on_fw_data_thx_slf_dc_up_low_bud				0x64
+	#define on_fw_data_thx_slf_bank_up						0x40
+	#define on_fw_data_thx_slf_bank_low						0x00
+	#define on_fw_data_idle_dis_pwd							0x40
+	#define on_fw_data_idle_en_pwd							0x00
+	#define on_fw_addr_fw_mode_status						0x99
+	#define on_fw_addr_icid_addr							0x900000d0
+	#define on_fw_addr_trigger_addr							0x10007088
+	#define on_fw_addr_fw_ver_start							0x90
+	#define on_fw_data_rawdata_ready_hb						0xa3
+	#define on_fw_data_rawdata_ready_lb						0x3a
+	#define on_fw_addr_ahb_addr								0x11
+	#define on_fw_data_ahb_dis								0x00
+	#define on_fw_data_ahb_en								0x01
+	#define on_fw_addr_event_addr							0x30
+#endif
+
+#if defined(CORE_FLASH)
+	#define flash_addr_ctrl_base							0x80000000
+	#define flash_addr_spi200_trans_fmt						(flash_addr_ctrl_base + 0x10)
+	#define flash_addr_spi200_trans_ctrl					(flash_addr_ctrl_base + 0x20)
+	#define flash_addr_spi200_cmd							(flash_addr_ctrl_base + 0x24)
+	#define flash_addr_spi200_addr							(flash_addr_ctrl_base + 0x28)
+	#define flash_addr_spi200_data							(flash_addr_ctrl_base + 0x2c)
+	#define flash_addr_spi200_bt_num						(flash_addr_ctrl_base + 0xe8)
+	#define flash_data_spi200_trans_fmt						0x00020780
+	#define flash_data_spi200_trans_ctrl_1					0x42000003
+	#define flash_data_spi200_trans_ctrl_2					0x47000000
+	#define flash_data_spi200_trans_ctrl_3					0x67000000
+	#define flash_data_spi200_trans_ctrl_4					0x610ff000
+	#define flash_data_spi200_trans_ctrl_5					0x694002ff
+	#define flash_data_spi200_cmd_1							0x00000005
+	#define flash_data_spi200_cmd_2							0x00000006
+	#define flash_data_spi200_cmd_3							0x000000C7
+	#define flash_data_spi200_cmd_4							0x000000D8
+	#define flash_data_spi200_cmd_5							0x00000020
+	#define flash_data_spi200_cmd_6							0x00000002
+	#define flash_data_spi200_cmd_7							0x0000003b
+	#define flash_data_spi200_addr							0x00000000
+
+	#define on_flash_addr_ctrl_base							0x80000000
+	#define on_flash_addr_ctrl_auto							0x80000004
+	#define on_flash_data_main_erase						0x0000A50D
+	#define on_flash_data_auto								0xA5
+	#define on_flash_data_main_read							0x03
+	#define on_flash_data_page_write						0x05
+	#define on_flash_data_spp_read							0x10
+	#define on_flash_data_sfr_read							0x14
+	#define on_flash_addr_ahb_ctrl							0x80000020
+	#define on_flash_data_ahb_squit							0x00000001
+	#define on_flash_addr_unlock_0							0x00000000
+	#define on_flash_addr_unlock_4							0x00000004
+	#define on_flash_addr_unlock_8							0x00000008
+	#define on_flash_addr_unlock_c							0x0000000C
+	#define on_flash_data_cmd0								0x28178EA0
+	#define on_flash_data_cmd1								0x0A0E03FF
+	#define on_flash_data_cmd2								0x8C203D0C
+	#define on_flash_data_cmd3								0x00300263
+	#define on_flash_data_lock								0x03400000
+#endif
+
+#if defined(CORE_SRAM)
+	#define sram_adr_mkey									0x100070E8
+	#define sram_adr_rawdata_addr							0x10000000
+	#define sram_adr_rawdata_end							0x00000000
+	#define	sram_passwrd_start								0x5AA5
+	#define	sram_passwrd_end								0xA55A
+
+	#define on_sram_adr_rawdata_addr						0x080002E0
+	#define on_sram_adr_rawdata_end							0x00000000
+	#define on_sram_cmd_conti								0x44332211
+	#define on_sram_cmd_fin									0x00000000
+	#define	on_sram_passwrd_start							0x5AA5
+	#define	on_sram_passwrd_end								0xA55A
+#endif
+
+#if defined(CORE_DRIVER)
+	#define driver_addr_fw_define_flash_reload				0x10007f00
+	#define driver_addr_fw_define_2nd_flash_reload			0x100072c0
+	#define driver_data_fw_define_flash_reload_dis			0x0000a55a
+	#define driver_data_fw_define_flash_reload_en			0x00000000
+	#define driver_addr_fw_define_int_is_edge				0x10007088
+	#define driver_addr_fw_define_rxnum_txnum_maxpt			0x100070f4
+	#define driver_data_fw_define_rxnum_txnum_maxpt_sorting	0x00000008
+	#define driver_data_fw_define_rxnum_txnum_maxpt_normal	0x00000014
+	#define driver_addr_fw_define_xy_res_enable				0x100070f8
+	#define driver_addr_fw_define_x_y_res					0x100070fc
+	#define driver_data_df_rx								36
+	#define driver_data_df_tx								18
+	#define driver_data_df_pt								10
+	#define driver_data_df_x_res							1080
+	#define driver_data_df_y_res							1920
+	#define on_driver_addr_fw_define_int_is_edge			0x10007088
+	#define on_driver_data_df_rx							28
+	#define on_driver_data_df_tx							14
+	#define on_driver_data_df_pt							10
+	#define on_driver_data_df_x_res							1080
+	#define on_driver_data_df_y_res							1920
+#ifndef HX_NEW_EVENT_STACK_FORMAT
+	#define on_driver_addr_fw_rx_tx_maxpt_num				0x0800001C
+	#define on_driver_addr_fw_xy_rev_int_edge				0x0800000C
+	#define on_driver_addr_fw_define_x_y_res				0x08000030
+#else
+	#define on_driver_addr_fw_rx_tx_maxpt_num				0x08000004
+	#define on_driver_addr_fw_maxpt_bt_num					0x0800000C
+	#define on_driver_addr_fw_xy_rev_int_edge				0x08000110
+	#define on_driver_addr_fw_define_x_y_res				0x08000010
+#endif
+
+#endif
+
+#if defined(HX_ZERO_FLASH)
+	#define zf_addr_dis_flash_reload						0x10007f00
+	#define zf_data_dis_flash_reload						0x00009AA9
+	#define zf_addr_system_reset							0x90000018
+	#define zf_data_system_reset							0x00000055
+	#define zf_data_sram_start_addr							0x08000000
+	#define zf_data_sram_clean								0x10000000
+	#define zf_data_cfg_info								0x10007000
+	#define zf_data_fw_cfg_1								0x10007084
+	#define zf_data_fw_cfg_2								0x10007264
+	#define zf_data_fw_cfg_3								0x10007300
+	#define zf_data_adc_cfg_1								0x10006A00
+	#define zf_data_adc_cfg_2								0x10007B28
+	#define zf_data_adc_cfg_3								0x10007AF0
+	#define zf_data_map_table								0x10007500
+	#define zf_data_mode_switch								0x10007294
+	#define zf_addr_sts_chk									0x900000A8
+	#define zf_data_activ_sts								0x05
+	#define zf_addr_activ_relod								0x90000048
+	#define zf_data_activ_in								0xEC
+
+#if defined(HX_CODE_OVERLAY)
+#if defined(HX83102D)
+	#define ovl_section_num      3
+	#define ovl_gesture_request  0x11
+	#define ovl_gesture_reply    0x22
+	#define ovl_border_request   0x55
+	#define ovl_border_reply     0x66
+	#define ovl_sorting_request  0x99
+	#define ovl_sorting_reply    0xAA
+	#define ovl_fault            0xFF
+#else
+	#define ovl_isram_addr                                  0x20008CE0
+	#define ovl_handshaking_addr                            0x10007FFC
+	#define ovl_gesture_request                             0x11
+	#define ovl_gesture_reply                               0x22
+	#define ovl_border_request                              0x55
+	#define ovl_border_reply                                0x66
+#endif
+#endif
+
+struct zf_info {
+	uint8_t sram_addr[4];
+	int write_size;
+	uint32_t fw_addr;
+	uint32_t cfg_addr;
+};
+#endif
+
+#ifdef HIMAX_PALM_SENSOR_EN
+	#define	palm_detection_register			0x10007FF4
+	#define	palm_detection_register_enable		0xA55AA55A
+	#define	palm_detection_register_disable		0x00000000
+#endif
+
+struct ic_operation {
+	uint8_t  addr_ahb_addr_byte_0[1];
+	uint8_t  addr_ahb_rdata_byte_0[1];
+	uint8_t  addr_ahb_access_direction[1];
+	uint8_t  addr_conti[1];
+	uint8_t  addr_incr4[1];
+	uint8_t  adr_i2c_psw_lb[1];
+	uint8_t  adr_i2c_psw_ub[1];
+	uint8_t  data_ahb_access_direction_read[1];
+	uint8_t  data_conti[1];
+	uint8_t  data_incr4[1];
+	uint8_t  data_i2c_psw_lb[1];
+	uint8_t  data_i2c_psw_ub[1];
+	uint8_t  addr_tcon_on_rst[4];
+	uint8_t  addr_adc_on_rst[4];
+	uint8_t  addr_psl[4];
+	uint8_t  addr_cs_central_state[4];
+	uint8_t  data_rst[4];
+	uint8_t  adr_osc_en[4];
+	uint8_t  adr_osc_pw[4];
+};
+
+struct fw_operation {
+	uint8_t  addr_system_reset[4];
+	uint8_t  addr_safe_mode_release_pw[4];
+	uint8_t  addr_ctrl_fw_isr[4];
+	uint8_t  addr_flag_reset_event[4];
+	uint8_t  addr_hsen_enable[4];
+	uint8_t  addr_smwp_enable[4];
+#ifdef HX_EDGE_LIMIT
+	uint8_t  addr_edge_limit_enable[4];
+#endif
+#ifdef HIMAX_PALM_SENSOR_EN
+	uint8_t  addr_palm_detection_enable[4];
+#endif
+	uint8_t  addr_program_reload_from[4];
+	uint8_t  addr_program_reload_to[4];
+	uint8_t  addr_program_reload_page_write[4];
+	uint8_t  addr_raw_out_sel[4];
+	uint8_t  addr_reload_status[4];
+	uint8_t  addr_reload_crc32_result[4];
+	uint8_t  addr_reload_addr_from[4];
+	uint8_t  addr_reload_addr_cmd_beat[4];
+	uint8_t  addr_selftest_addr_en[4];
+	uint8_t  addr_criteria_addr[4];
+	uint8_t  addr_set_frame_addr[4];
+	uint8_t  addr_selftest_result_addr[4];
+	uint8_t  addr_sorting_mode_en[4];
+	uint8_t  addr_max_dc[4];
+	uint8_t  addr_fw_mode_status[4];
+	uint8_t  addr_icid_addr[4];
+	uint8_t  addr_trigger_addr[4];
+	uint8_t  addr_fw_ver_addr[4];
+	uint8_t  addr_fw_cfg_addr[4];
+	uint8_t  addr_fw_vendor_addr[4];
+	uint8_t  addr_cus_info[4];
+	uint8_t  addr_proj_info[4];
+	uint8_t  addr_fw_state_addr[4];
+	uint8_t  addr_fw_dbg_msg_addr[4];
+	uint8_t  addr_chk_fw_status[4];
+	uint8_t  addr_dd_handshak_addr[4];
+	uint8_t  addr_dd_data_addr[4];
+	uint8_t  data_system_reset[4];
+	uint8_t  data_safe_mode_release_pw_active[4];
+	uint8_t  data_safe_mode_release_pw_reset[4];
+	uint8_t  data_clear[4];
+	uint8_t  data_fw_stop[4];
+	uint8_t  data_program_reload_start[4];
+	uint8_t  data_program_reload_compare[4];
+	uint8_t  data_program_reload_break[4];
+	uint8_t  data_selftest_request[4];
+	uint8_t  data_criteria_aa_top[1];
+	uint8_t  data_criteria_aa_bot[1];
+	uint8_t  data_criteria_key_top[1];
+	uint8_t  data_criteria_key_bot[1];
+	uint8_t  data_criteria_avg_top[1];
+	uint8_t  data_criteria_avg_bot[1];
+	uint8_t  data_set_frame[4];
+	uint8_t  data_selftest_ack_hb[1];
+	uint8_t  data_selftest_ack_lb[1];
+	uint8_t  data_selftest_pass[1];
+	uint8_t  data_normal_cmd[1];
+	uint8_t  data_normal_status[1];
+	uint8_t  data_sorting_cmd[1];
+	uint8_t  data_sorting_status[1];
+	uint8_t  data_dd_request[1];
+	uint8_t  data_dd_ack[1];
+	uint8_t  data_idle_dis_pwd[1];
+	uint8_t  data_idle_en_pwd[1];
+	uint8_t  data_rawdata_ready_hb[1];
+	uint8_t  data_rawdata_ready_lb[1];
+	uint8_t  addr_ahb_addr[1];
+	uint8_t  data_ahb_dis[1];
+	uint8_t  data_ahb_en[1];
+	uint8_t  addr_event_addr[1];
+	uint8_t  addr_usb_detect[4];
+	uint8_t  addr_ulpm_33[1];
+	uint8_t  addr_ulpm_34[1];
+	uint8_t  data_ulpm_11[1];
+	uint8_t  data_ulpm_22[1];
+	uint8_t  data_ulpm_33[1];
+	uint8_t  data_ulpm_aa[1];
+};
+
+struct flash_operation {
+	uint8_t  addr_spi200_trans_fmt[4];
+	uint8_t  addr_spi200_trans_ctrl[4];
+	uint8_t  addr_spi200_cmd[4];
+	uint8_t  addr_spi200_addr[4];
+	uint8_t  addr_spi200_data[4];
+	uint8_t  addr_spi200_bt_num[4];
+
+	uint8_t  data_spi200_trans_fmt[4];
+	uint8_t  data_spi200_trans_ctrl_1[4];
+	uint8_t  data_spi200_trans_ctrl_2[4];
+	uint8_t  data_spi200_trans_ctrl_3[4];
+	uint8_t  data_spi200_trans_ctrl_4[4];
+	uint8_t  data_spi200_trans_ctrl_5[4];
+	uint8_t  data_spi200_cmd_1[4];
+	uint8_t  data_spi200_cmd_2[4];
+	uint8_t  data_spi200_cmd_3[4];
+	uint8_t  data_spi200_cmd_4[4];
+	uint8_t  data_spi200_cmd_5[4];
+	uint8_t  data_spi200_cmd_6[4];
+	uint8_t  data_spi200_cmd_7[4];
+	uint8_t  data_spi200_addr[4];
+};
+
+struct sram_operation {
+	uint8_t  addr_mkey[4];
+	uint8_t  addr_rawdata_addr[4];
+	uint8_t  addr_rawdata_end[4];
+	uint8_t	 passwrd_start[2];
+	uint8_t	 passwrd_end[2];
+};
+
+struct driver_operation {
+	uint8_t  addr_fw_define_flash_reload[4];
+	uint8_t  addr_fw_define_2nd_flash_reload[4];
+	uint8_t  addr_fw_define_int_is_edge[4];
+	uint8_t  addr_fw_define_rxnum_txnum_maxpt[4];
+	uint8_t  addr_fw_define_xy_res_enable[4];
+	uint8_t  addr_fw_define_x_y_res[4];
+	uint8_t  data_df_rx[1];
+	uint8_t  data_df_tx[1];
+	uint8_t  data_df_pt[1];
+	uint8_t  data_df_x_res[2];
+	uint8_t  data_df_y_res[2];
+	uint8_t  data_fw_define_flash_reload_dis[4];
+	uint8_t  data_fw_define_flash_reload_en[4];
+	uint8_t  data_fw_define_rxnum_txnum_maxpt_sorting[4];
+	uint8_t  data_fw_define_rxnum_txnum_maxpt_normal[4];
+};
+
+struct zf_operation {
+	uint8_t addr_dis_flash_reload[4];
+	uint8_t data_dis_flash_reload[4];
+	uint8_t addr_system_reset[4];
+	uint8_t data_system_reset[4];
+	uint8_t data_sram_start_addr[4];
+	uint8_t data_sram_clean[4];
+	uint8_t data_cfg_info[4];
+	uint8_t data_fw_cfg_1[4];
+	uint8_t data_fw_cfg_2[4];
+	uint8_t data_fw_cfg_3[4];
+	uint8_t data_adc_cfg_1[4];
+	uint8_t data_adc_cfg_2[4];
+	uint8_t data_adc_cfg_3[4];
+	uint8_t data_map_table[4];
+	uint8_t data_mode_switch[4];
+	uint8_t addr_sts_chk[4];
+	uint8_t data_activ_sts[1];
+	uint8_t addr_activ_relod[4];
+	uint8_t data_activ_in[1];
+};
+
+struct himax_core_command_operation {
+	struct ic_operation *ic_op;
+	struct fw_operation *fw_op;
+	struct flash_operation *flash_op;
+	struct sram_operation *sram_op;
+	struct driver_operation *driver_op;
+	struct zf_operation *zf_op;
+};
+
+struct on_ic_operation {
+	uint8_t  addr_ahb_addr_byte_0[1];
+	uint8_t  addr_ahb_rdata_byte_0[1];
+	uint8_t  addr_ahb_access_direction[1];
+	uint8_t  addr_conti[1];
+	uint8_t  addr_incr4[1];
+	uint8_t adr_mcu_ctrl[1];
+	uint8_t  data_ahb_access_direction_read[1];
+	uint8_t  data_conti[1];
+	uint8_t  data_incr4[1];
+	uint8_t cmd_mcu_on[1];
+	uint8_t cmd_mcu_off[1];
+	uint8_t adr_sleep_ctrl[1];
+	uint8_t cmd_sleep_in[1];
+	uint8_t adr_tcon_ctrl[4];
+	uint8_t cmd_tcon_on[4];
+	uint8_t adr_wdg_ctrl[4];
+	uint8_t cmd_wdg_psw[4];
+	uint8_t adr_wdg_cnt_ctrl[4];
+	uint8_t cmd_wdg_cnt_clr[4];
+};
+
+struct on_fw_operation {
+	uint8_t  addr_smwp_enable[1];
+	uint8_t  addr_program_reload_from[4];
+	uint8_t  addr_raw_out_sel[1];
+	uint8_t  addr_flash_checksum[4];
+	uint8_t  data_flash_checksum[4];
+	uint8_t  addr_crc_value[4];
+	uint8_t  addr_reload_status[4];
+	uint8_t  addr_reload_crc32_result[4];
+	uint8_t  addr_reload_addr_from[4];
+	uint8_t  addr_reload_addr_cmd_beat[4];
+	uint8_t  addr_set_frame_addr[4];
+	uint8_t  addr_fw_mode_status[1];
+	uint8_t  addr_icid_addr[4];
+	uint8_t  addr_trigger_addr[4];
+	uint8_t  addr_fw_ver_start[1];
+	uint8_t  data_safe_mode_release_pw_active[4];
+	uint8_t  data_safe_mode_release_pw_reset[4];
+	uint8_t  data_clear[4];
+	uint8_t  addr_criteria_addr[1];
+	uint8_t  data_selftest_pass[1];
+	uint8_t  addr_reK_crtl[4];
+	uint8_t  data_reK_en[1];
+	uint8_t  data_reK_dis[1];
+	uint8_t  data_rst_init[1];
+	uint8_t  data_dc_set[1];
+	uint8_t  data_bank_set[1];
+	uint8_t  addr_selftest_addr_en[1];
+	uint8_t  addr_selftest_result_addr[1];
+	uint8_t  data_selftest_request[1];
+	uint8_t  data_thx_avg_mul_dc_lsb[1];
+	uint8_t  data_thx_avg_mul_dc_msb[1];
+	uint8_t  data_thx_mul_dc_up_low_bud[1];
+	uint8_t  data_thx_avg_slf_dc_lsb[1];
+	uint8_t  data_thx_avg_slf_dc_msb[1];
+	uint8_t  data_thx_slf_dc_up_low_bud[1];
+	uint8_t  data_thx_slf_bank_up[1];
+	uint8_t  data_thx_slf_bank_low[1];
+	uint8_t  data_idle_dis_pwd[1];
+	uint8_t  data_idle_en_pwd[1];
+	uint8_t  data_rawdata_ready_hb[1];
+	uint8_t  data_rawdata_ready_lb[1];
+	uint8_t  addr_ahb_addr[1];
+	uint8_t  data_ahb_dis[1];
+	uint8_t  data_ahb_en[1];
+	uint8_t  addr_event_addr[1];
+	uint8_t  addr_usb_detect[1];
+};
+
+struct on_flash_operation {
+	uint8_t addr_ctrl_base[4];
+	uint8_t  addr_ctrl_auto[4];
+	uint8_t  data_main_erase[4];
+	uint8_t  data_auto[1];
+	uint8_t  data_main_read[1];
+	uint8_t  data_page_write[1];
+	uint8_t  data_sfr_read[1];
+	uint8_t  data_spp_read[1];
+	uint8_t  addr_ahb_ctrl[4];
+	uint8_t  data_ahb_squit[4];
+
+	uint8_t  addr_unlock_0[4];
+	uint8_t  addr_unlock_4[4];
+	uint8_t  addr_unlock_8[4];
+	uint8_t  addr_unlock_c[4];
+	uint8_t  data_cmd0[4];
+	uint8_t  data_cmd1[4];
+	uint8_t  data_cmd2[4];
+	uint8_t  data_cmd3[4];
+	uint8_t  data_lock[4];
+};
+
+struct on_sram_operation {
+	uint8_t  addr_rawdata_addr[4];
+	uint8_t  addr_rawdata_end[4];
+	uint8_t  data_conti[4];
+	uint8_t  data_fin[4];
+	uint8_t	 passwrd_start[2];
+	uint8_t	 passwrd_end[2];
+};
+
+struct on_driver_operation {
+	uint8_t  addr_fw_define_int_is_edge[4];
+	uint8_t addr_fw_rx_tx_maxpt_num[4];
+#ifdef HX_NEW_EVENT_STACK_FORMAT
+	uint8_t addr_fw_maxpt_bt_num[4];
+#endif
+	uint8_t addr_fw_xy_rev_int_edge[4];
+	uint8_t addr_fw_define_x_y_res[4];
+	uint8_t  data_fw_define_rxnum_txnum_maxpt_sorting[4];
+	uint8_t  data_fw_define_rxnum_txnum_maxpt_normal[4];
+	uint8_t  data_df_rx[1];
+	uint8_t  data_df_tx[1];
+	uint8_t  data_df_pt[1];
+	uint8_t  data_df_x_res[2];
+	uint8_t  data_df_y_res[2];
+};
+
+struct himax_on_core_command_operation {
+	struct on_ic_operation *ic_op;
+	struct on_fw_operation *fw_op;
+	struct on_flash_operation *flash_op;
+	struct on_sram_operation *sram_op;
+	struct on_driver_operation *driver_op;
+};
+
+struct himax_chip_detect {
+	bool (*fp_chip_detect)(void);
+};
+
+struct himax_chip_entry {
+	struct himax_chip_detect *core_chip_dt;
+	uint32_t hx_ic_dt_num;
+};
+
+struct himax_core_fp {
+#ifdef CORE_IC
+	void (*fp_burst_enable)(uint8_t auto_add_4_byte);
+	int (*fp_register_read)(uint8_t *read_addr, uint32_t read_length, uint8_t *read_data, uint8_t cfg_flag);
+	/*int (*fp_flash_write_burst)(uint8_t *reg_byte, uint8_t *write_data);*/
+	/*void (*fp_flash_write_burst_lenth)(uint8_t *reg_byte, uint8_t *write_data, uint32_t length);*/
+	int (*fp_register_write)(uint8_t *write_addr, uint32_t write_length, uint8_t *write_data, uint8_t cfg_flag);
+	void (*fp_interface_on)(void);
+	void (*fp_sense_on)(uint8_t FlashMode);
+	void (*fp_tcon_on)(void);
+	bool (*fp_watch_dog_off)(void);
+	bool (*fp_sense_off)(bool check_en);
+	void (*fp_sleep_in)(void);
+	bool (*fp_wait_wip)(int Timing);
+	void (*fp_init_psl)(void);
+	void (*fp_resume_ic_action)(void);
+	void (*fp_suspend_ic_action)(void);
+	void (*fp_power_on_init)(void);
+	bool (*fp_dd_clk_set)(bool enable);
+	void (*fp_dd_reg_en)(bool enable);
+	bool (*fp_dd_reg_write)(uint8_t addr, uint8_t pa_num, int len, uint8_t *data, uint8_t bank);
+	bool (*fp_dd_reg_read)(uint8_t addr, uint8_t pa_num, int len, uint8_t *data, uint8_t bank);
+	bool (*fp_ic_id_read)(void);
+	bool (*fp_slave_tcon_reset)(void);
+	bool (*fp_slave_adc_reset_slave)(void);
+	bool (*fp_slave_wdt_off_slave)(void);
+#endif
+
+#ifdef CORE_FW
+	void (*fp_parse_raw_data)(struct himax_report_data *hx_touch_data, int mul_num, int self_num, uint8_t diag_cmd, int16_t *mutual_data, int16_t *self_data);
+	void (*fp_system_reset)(void);
+	int (*fp_Calculate_CRC_with_AP)(unsigned char *FW_content, int CRC_from_FW, int len);
+	uint32_t (*fp_check_CRC)(uint8_t *start_addr, int reload_length);
+	void (*fp_set_reload_cmd)(uint8_t *write_data, int idx, uint32_t cmd_from, uint32_t cmd_to, uint32_t cmd_beat);
+	bool (*fp_program_reload)(void);
+	void (*fp_set_SMWP_enable)(uint8_t SMWP_enable, bool suspended);
+#ifdef HX_EDGE_LIMIT
+	void (*fp_set_edge_limit_enable)(uint8_t edge_limit_enable, bool suspended);
+#endif
+	void (*fp_set_HSEN_enable)(uint8_t HSEN_enable, bool suspended);
+	void (*fp_diag_register_set)(uint8_t diag_command, uint8_t storage_type);
+#ifdef HX_TP_SELF_TEST_DRIVER
+	void (*fp_control_reK)(bool enable);
+#endif
+	int (*fp_chip_self_test)(void);
+	void (*fp_idle_mode)(int disable);
+	void (*fp_reload_disable)(int disable);
+	bool (*fp_check_chip_version)(void);
+	int (*fp_read_ic_trigger_type)(void);
+	int (*fp_read_i2c_status)(void);
+	void (*fp_read_FW_ver)(void);
+	bool (*fp_read_event_stack)(uint8_t *buf, uint8_t length);
+	void (*fp_return_event_stack)(void);
+	bool (*fp_calculateChecksum)(bool change_iref, uint32_t size);
+	int (*fp_read_FW_status)(uint8_t *state_addr, uint8_t *tmp_addr);
+	void (*fp_irq_switch)(int switch_on);
+	int (*fp_assign_sorting_mode)(uint8_t *tmp_data);
+	int (*fp_check_sorting_mode)(uint8_t *tmp_data);
+	int (*fp_switch_mode)(int mode);
+	int (*fp_get_max_dc)(void);
+	uint8_t (*fp_read_DD_status)(uint8_t *cmd_set, uint8_t *tmp_data);
+	int (*fp_ulpm_in)(void);
+	int (*fp_black_gest_ctrl)(bool enable);
+	int	(*_diff_overlay_bin)(void);
+#endif
+
+#ifdef CORE_FLASH
+	void (*fp_chip_erase)(void);
+	bool (*fp_block_erase)(int start_addr, int length);
+	bool (*fp_sector_erase)(int start_addr);
+	void (*fp_flash_programming)(uint8_t *FW_content, int FW_Size);
+	void (*fp_flash_page_write)(uint8_t *write_addr, int length, uint8_t *write_data);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_32k)(unsigned char *fw, int len, bool change_iref);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_60k)(unsigned char *fw, int len, bool change_iref);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_64k)(unsigned char *fw, int len, bool change_iref);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_124k)(unsigned char *fw, int len, bool change_iref);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_128k)(unsigned char *fw, int len, bool change_iref);
+	void (*fp_flash_dump_func)(uint8_t local_flash_command, int Flash_Size, uint8_t *flash_buffer);
+	bool (*fp_flash_lastdata_check)(uint32_t size);
+	bool (*fp_ahb_squit)(void);
+	void (*fp_flash_read)(uint8_t *r_data, int start_addr, int length);
+	bool (*fp_sfr_rw)(uint8_t *addr, int length, uint8_t *data, uint8_t rw_ctrl);
+	bool (*fp_lock_flash)(void);
+	bool (*fp_unlock_flash)(void);
+	void  (*fp_init_auto_func)(void);
+	int	(*_diff_overlay_flash)(void);
+#endif
+
+#ifdef CORE_SRAM
+	void (*fp_sram_write)(uint8_t *FW_content);
+	bool (*fp_sram_verify)(uint8_t *FW_File, int FW_Size);
+	bool (*fp_get_DSRAM_data)(uint8_t *info_data, bool DSRAM_Flag);
+#endif
+
+#ifdef CORE_DRIVER
+	void (*fp_chip_init)(void);
+#ifdef HX_AUTO_UPDATE_FW
+	int (*fp_fw_ver_bin)(void);
+#endif
+	void (*fp_pin_reset)(void);
+	void (*fp_touch_information)(void);
+	void (*fp_reload_config)(void);
+	int (*fp_get_touch_data_size)(void);
+	void (*fp_usb_detect_set)(uint8_t *cable_config);
+	int (*fp_hand_shaking)(void);
+	int (*fp_determin_diag_rawdata)(int diag_command);
+	int (*fp_determin_diag_storage)(int diag_command);
+	int (*fp_cal_data_len)(int raw_cnt_rmd, int HX_MAX_PT, int raw_cnt_max);
+	bool (*fp_diag_check_sum)(struct himax_report_data *hx_touch_data);
+	void (*fp_diag_parse_raw_data)(struct himax_report_data *hx_touch_data, int mul_num, int self_num, uint8_t diag_cmd, int32_t *mutual_data, int32_t *self_data);
+	void (*fp_ic_reset)(uint8_t loadconfig, uint8_t int_off);
+	int (*fp_ic_esd_recovery)(int hx_esd_event, int hx_zero_event, int length);
+#if defined(HX_112F_SET)
+	void (*_esd_ic_dd_reset)(void);
+#endif
+	void (*fp_esd_ic_reset)(void);
+	void (*fp_resend_cmd_func)(bool suspended);
+#ifdef HX_TP_PROC_GUEST_INFO
+	int (*guest_info_get_status)(void);
+	int (*read_guest_info)(void);
+#endif
+#endif
+#ifdef HX_ZERO_FLASH
+	void (*fp_clean_sram_0f)(uint8_t *addr, int write_len, int type);
+	void (*fp_write_sram_0f)(const struct firmware *fw_entry, uint8_t *addr, int start_index, uint32_t write_len);
+	int (*fp_write_sram_0f_crc)(const struct firmware *fw_entry, uint8_t *addr, int start_index, uint32_t write_len);
+	void (*fp_firmware_update_0f)(const struct firmware *fw_entry);
+	int (*fp_0f_operation_dirly)(void);
+	int (*fp_0f_op_file_dirly)(char *file_name);
+	void (*fp_0f_operation)(struct work_struct *work);
+	int (*fp_0f_esd_check)(void);
+#if defined(HX83102D) || defined(HX_112F_SET)
+	void (*fp_0f_reload_to_active)(void);
+#endif
+#ifdef HX_0F_DEBUG
+	void (*fp_read_sram_0f)(const struct firmware *fw_entry, uint8_t *addr, int start_index, int read_len);
+	void (*fp_read_all_sram)(uint8_t *addr, int read_len);
+	void (*fp_firmware_read_0f)(const struct firmware *fw_entry, int type);
+	void (*fp_0f_operation_check)(int type);
+#endif
+#ifdef HX_CODE_OVERLAY
+	int (*fp_0f_overlay)(int ovl_type, int mode);
+#endif
+#ifdef HIMAX_PALM_SENSOR_EN
+	int (*fp_palm_detection_function)(int mode);
+#endif
+#endif
+};
+
+#endif
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_ic_incell_core.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_ic_incell_core.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_inspection.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_inspection.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_inspection.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_inspection.h
@ -0,0 +1,219 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for inspection functions
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include "himax_ic_core.h"
+
+/*#define HX_GAP_TEST*/
+/*#define HX_INSPECT_LPWUG_TEST*/
+/*#define HX_ACT_IDLE_TEST*/
+
+#define HX_RSLT_OUT_PATH "/sdcard/"
+#define HX_RSLT_OUT_FILE "hx_test_result.txt"
+#define PI(x...) pr_info(x)
+
+#ifdef HX_ESD_RECOVERY
+	extern u8 HX_ESD_RESET_ACTIVATE;
+#endif
+#ifdef HX_112F_SET
+#define BS_RAWDATA	8
+#define BS_NOISE	8
+#else
+#define BS_RAWDATA	10
+#define BS_NOISE	10
+#endif
+#define BS_OPENSHORT	0
+#define	BS_LPWUG	1
+#define	BS_LPWUG_dile	1
+#define	BS_ACT_IDLE	1
+
+/* skip notch & dummy */
+#define SKIP_NOTCH_START 5
+#define SKIP_NOTCH_END 10
+/* TX+SKIP_NOTCH_START */
+#define SKIP_DUMMY_START 23
+/* TX+SKIP_NOTCH_END*/
+#define SKIP_DUMMY_END 28
+
+#ifdef HX_112F_SET
+#define	NOISEFRAME	60
+#else
+#define	NOISEFRAME	(BS_NOISE+1)
+#endif
+
+#define NORMAL_IDLE_RAWDATA_NOISEFRAME 10
+#define LPWUG_RAWDATAFRAME 1
+#define LPWUG_NOISEFRAME 1
+#define LPWUG_IDLE_RAWDATAFRAME 1
+#define LPWUG_IDLE_NOISEFRAME 1
+
+#define OTHERSFRAME	2
+
+#define	UNIFMAX	500
+
+
+/*Himax MP Password*/
+#define	PWD_OPEN_START	0x77
+#define	PWD_OPEN_END	0x88
+#define	PWD_SHORT_START	0x11
+#define	PWD_SHORT_END	0x33
+#define	PWD_RAWDATA_START	0x00
+#define	PWD_RAWDATA_END	0x99
+#define	PWD_NOISE_START	0x00
+#define	PWD_NOISE_END	0x99
+#define	PWD_SORTING_START	0xAA
+#define	PWD_SORTING_END	0xCC
+
+
+#define PWD_ACT_IDLE_START		0x22
+#define PWD_ACT_IDLE_END		0x44
+
+
+
+#define PWD_LPWUG_START	0x55
+#define PWD_LPWUG_END	0x66
+
+#define PWD_LPWUG_IDLE_START	0x50
+#define PWD_LPWUG_IDLE_END	0x60
+
+
+/*Himax DataType*/
+#define DATA_SORTING	0x0A
+#define DATA_OPEN	0x0B
+#define DATA_MICRO_OPEN	0x0C
+#define DATA_SHORT	0x0A
+#define DATA_RAWDATA	0x0A
+#define DATA_NOISE	0x0F
+#define DATA_BACK_NORMAL	0x00
+#define DATA_LPWUG_RAWDATA	0x0C
+#define DATA_LPWUG_NOISE	0x0F
+#define DATA_ACT_IDLE_RAWDATA	0x0A
+#define DATA_ACT_IDLE_NOISE	0x0F
+#define DATA_LPWUG_IDLE_RAWDATA	0x0A
+#define DATA_LPWUG_IDLE_NOISE	0x0F
+
+/*Himax Data Ready Password*/
+#define	Data_PWD0	0xA5
+#define	Data_PWD1	0x5A
+
+/* ASCII format */
+#define ASCII_LF	(0x0A)
+#define ASCII_CR	(0x0D)
+#define ASCII_COMMA	(0x2C)
+#define ASCII_ZERO	(0x30)
+#define CHAR_EL	'\0'
+#define CHAR_NL	'\n'
+#define ACSII_SPACE	(0x20)
+/* INSOECTION Setting */
+/*extern int HX_CRITERIA_ITEM;*/
+/*extern int HX_CRITERIA_SIZE;*/
+/*extern char *g_file_path;*/
+/*extern char *g_rslt_data;*/
+void himax_inspection_init(void);
+extern int *g_inspt_crtra_flag;
+
+enum THP_INSPECTION_ENUM {
+	HIMAX_INSPECTION_OPEN,
+	HIMAX_INSPECTION_MICRO_OPEN,
+	HIMAX_INSPECTION_SHORT,
+	HIMAX_INSPECTION_RAWDATA,
+	HIMAX_INSPECTION_BPN_RAWDATA,
+	HIMAX_INSPECTION_WEIGHT_NOISE,
+	HIMAX_INSPECTION_ABS_NOISE,
+	HIMAX_INSPECTION_SORTING,
+	HIMAX_INSPECTION_BACK_NORMAL,
+
+	HIMAX_INSPECTION_GAPTEST_RAW,
+
+	HIMAX_INSPECTION_ACT_IDLE_RAWDATA,
+	HIMAX_INSPECTION_ACT_IDLE_NOISE,
+
+	HIMAX_INSPECTION_LPWUG_RAWDATA,
+	HIMAX_INSPECTION_LPWUG_NOISE,
+	HIMAX_INSPECTION_LPWUG_IDLE_RAWDATA,
+	HIMAX_INSPECTION_LPWUG_IDLE_NOISE,
+
+};
+
+
+enum HX_CRITERIA_ENUM {
+	IDX_RAWMIN		= 0,
+	IDX_RAWMAX,
+	IDX_BPN_RAWMIN,
+	IDX_BPN_RAWMAX,
+	IDX_SHORTMIN,
+	IDX_SHORTMAX,
+	IDX_OPENMIN,
+	IDX_OPENMAX,
+	IDX_M_OPENMIN,
+	IDX_M_OPENMAX,
+	IDX_WT_NOISEMIN,
+	IDX_WT_NOISEMAX,
+	IDX_ABS_NOISEMIN,
+	IDX_ABS_NOISEMAX,
+	IDX_SORTMIN,
+	IDX_SORTMAX,
+
+	IDX_GAP_HOR_RAWMAX,
+	IDX_GAP_HOR_RAWMIN,
+	IDX_GAP_VER_RAWMAX,
+	IDX_GAP_VER_RAWMIN,
+
+	IDX_ACT_IDLE_NOISE_MIN,
+	IDX_ACT_IDLE_NOISE_MAX,
+	IDX_ACT_IDLE_RAWDATA_MIN,
+	IDX_ACT_IDLE_RAWDATA_MAX,
+
+	IDX_LPWUG_NOISE_MIN,
+	IDX_LPWUG_NOISE_MAX,
+	IDX_LPWUG_RAWDATA_MIN,
+	IDX_LPWUG_RAWDATA_MAX,
+
+	IDX_LPWUG_IDLE_NOISE_MIN,
+	IDX_LPWUG_IDLE_NOISE_MAX,
+	IDX_LPWUG_IDLE_RAWDATA_MIN,
+	IDX_LPWUG_IDLE_RAWDATA_MAX,
+
+};
+
+/* Error code of Inspection */
+enum HX_INSPECT_ERR_ENUM {
+	HX_INSPECT_OK =                0x00000000, /* OK */
+	HX_INSPECT_EFILE =             0x00000001, /*Criteria file error*/
+	HX_INSPECT_ERAW =              0x00000002, /* Raw data error */
+	HX_INSPECT_WT_ENOISE =         0x00000004, /* Noise error */
+	HX_INSPECT_ABS_ENOISE =        0x00000008, /* Noise error */
+	HX_INSPECT_EOPEN =             0x00000010, /* Sensor open error */
+	HX_INSPECT_EMOPEN =            0x00000020, /* Sensor micro open error */
+	HX_INSPECT_ESHORT =            0x00000040, /* Sensor short error */
+
+	HX_INSPECT_EGAP_RAW =          0x00000080, /* Raw Data GAP  */
+
+	HX_INSPECT_EACT_IDLE_RAW =     0x00000100, /* ACT_IDLE RAW ERROR */
+	HX_INSPECT_EACT_IDLE_NOISE =   0x00000200, /* ACT_IDLE NOISE ERROR */
+
+	HX_INSPECT_ELPWUG_RAW =        0x00000400, /* LPWUG RAW ERROR */
+	HX_INSPECT_ELPWUG_NOISE =      0x00000800, /* LPWUG NOISE ERROR */
+	HX_INSPECT_ELPWUG_IDLE_RAW =   0x00001000, /* LPWUG IDLE RAW ERROR */
+	HX_INSPECT_ELPWUG_IDLE_NOISE = 0x00002000, /* LPWUG IDLE NOISE ERROR */
+
+	HX_INSPECT_EGETRAW =           0x00004000, /* Get raw data errors */
+	HX_INSPECT_MEMALLCTFAIL =      0x00008000, /* Get raw data errors */
+	/*HX_INSPECT_ESPI = , */        /*SPI communication error,no use*/
+};
+
+extern void himax_inspect_data_clear(void);
+extern char *hx_self_test_file_name;
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_modular_table.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_modular_table.h
@ -0,0 +1,115 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for modularize functions
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef __HIMAX_MODULAR_TABLE_H__
+#define __HIMAX_MODULAR_TABLE_H__
+
+#include "himax_ic_core.h"
+
+#define TO_STR(VAR)	#VAR
+#define DECLARE(sym)	struct himax_chip_entry sym; \
+			EXPORT_SYMBOL(sym)
+
+static const char * const himax_ksym_lookup[] = {
+	#if defined(HX_MOD_KSYM_HX852xG)
+	TO_STR(HX_MOD_KSYM_HX852xG),
+	#endif
+	#if defined(HX_MOD_KSYM_HX852xH)
+	TO_STR(HX_MOD_KSYM_HX852xH),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83102)
+	TO_STR(HX_MOD_KSYM_HX83102),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83103)
+	TO_STR(HX_MOD_KSYM_HX83103),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83106)
+	TO_STR(HX_MOD_KSYM_HX83106),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83111)
+	TO_STR(HX_MOD_KSYM_HX83111),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83112)
+	TO_STR(HX_MOD_KSYM_HX83112),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83113)
+	TO_STR(HX_MOD_KSYM_HX83113),
+	#endif
+	#if defined(HX_MOD_KSYM_HX83191)
+	TO_STR(HX_MOD_KSYM_HX83191),
+	#endif
+	NULL
+};
+
+static struct himax_chip_entry *get_chip_entry_by_index(int32_t idx)
+{
+	return  (void *)kallsyms_lookup_name(himax_ksym_lookup[idx]);
+}
+
+enum modular_table {
+	MODULE_NOT_FOUND = -1,
+	MODULE_FOUND,
+	MODULE_EMPTY,
+};
+
+/*
+ * Return 1 when specified entry is empty, 0 when not, -1 when index error
+ */
+static int32_t isEmpty(int32_t idx)
+{
+	int32_t size = sizeof(himax_ksym_lookup) / sizeof(char *);
+	struct himax_chip_entry *entry;
+
+	if (idx < 0 || idx >= size)
+		return MODULE_NOT_FOUND;
+
+	entry = get_chip_entry_by_index(idx);
+	if (entry)
+		return (entry->core_chip_dt == NULL)?MODULE_EMPTY:MODULE_FOUND;
+
+	return MODULE_NOT_FOUND;
+}
+
+/*
+ * Search for created entry, if not existed, return 1st
+ * Return index of himax_ksym_lookup
+ */
+static int32_t himax_get_ksym_idx(void)
+{
+	int32_t i, first = -1;
+	int32_t size = sizeof(himax_ksym_lookup) / sizeof(char *);
+	struct himax_chip_entry *entry;
+
+	I("%s: symtable size: %d\n", __func__, size);
+	for (i = 0; i < size; i++) {
+		if (himax_ksym_lookup[i] == NULL)
+			break;
+
+		I("%s: %s\n", __func__, himax_ksym_lookup[i]);
+		entry = get_chip_entry_by_index(i);
+		if (entry) {
+			if (first < 0)
+				first = i;
+			if (isEmpty(i) == 0)
+				return i;
+		}
+	}
+	if (first >= 0)
+		return first;
+	/*incorrect use state, means no ic defined*/
+	return MODULE_NOT_FOUND;
+}
+
+#endif
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_platform.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_platform.h
@ -0,0 +1,5 @@
+#ifdef __HIMAX_PLATFORM_SPI__
+#include "himax_platform_QCT_SPI.h"
+#else
+#include "himax_platform_QCT_I2C.h"
+#endif
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_I2C.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_I2C.c
@ -0,0 +1,972 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for QCT platform
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+
+int i2c_error_count;
+int irq_enable_count;
+EXPORT_SYMBOL(irq_enable_count);
+
+int himax_dev_set(struct himax_ts_data *ts)
+{
+	int ret = 0;
+
+
+	ts->input_dev = input_allocate_device();
+
+	if (ts->input_dev == NULL) {
+		ret = -ENOMEM;
+		E("%s: Failed to allocate input device-input_dev\n", __func__);
+		return ret;
+	}
+
+	ts->input_dev->name = "himax-touchscreen";
+#if defined(HX_PEN_FUNC_EN)
+	ts->hx_pen_dev = input_allocate_device();
+
+	if (ts->hx_pen_dev == NULL) {
+		ret = -ENOMEM;
+		E("%s: Failed to allocate input device-hx_pen_dev\n", __func__);
+		return ret;
+	}
+
+	ts->hx_pen_dev->name = "himax-pen";
+#endif
+	return ret;
+}
+int himax_input_register_device(struct input_dev *input_dev)
+{
+	return input_register_device(input_dev);
+}
+
+#if defined(HX_PLATFOME_DEFINE_KEY)
+void himax_platform_key(void)
+{
+	I("Nothing to be done! Plz cancel it!\n");
+}
+#endif
+
+void himax_vk_parser(struct device_node *dt,
+						struct himax_i2c_platform_data *pdata)
+{
+	u32 data = 0;
+	uint8_t cnt = 0, i = 0;
+	uint32_t coords[4] = {0};
+	struct device_node *node, *pp = NULL;
+	struct himax_virtual_key *vk;
+
+
+	node = of_parse_phandle(dt, "virtualkey", 0);
+
+	if (node == NULL) {
+		I(" DT-No vk info in DT\n");
+	} else {
+		while ((pp = of_get_next_child(node, pp)))
+			cnt++;
+
+		if (!cnt)
+			return;
+
+		vk = kcalloc(cnt, sizeof(struct himax_virtual_key), GFP_KERNEL);
+		pp = NULL;
+
+		while ((pp = of_get_next_child(node, pp))) {
+			if (of_property_read_u32(pp, "idx", &data) == 0)
+				vk[i].index = data;
+
+			if (of_property_read_u32_array(pp, "range", coords, 4) == 0) {
+				vk[i].x_range_min = coords[0], vk[i].x_range_max = coords[1];
+				vk[i].y_range_min = coords[2], vk[i].y_range_max = coords[3];
+			} else {
+				I(" range faile\n");
+			}
+
+			i++;
+		}
+
+		pdata->virtual_key = vk;
+
+		for (i = 0; i < cnt; i++)
+			I(" vk[%d] idx:%d x_min:%d, y_max:%d\n", i, pdata->virtual_key[i].index,
+			  pdata->virtual_key[i].x_range_min, pdata->virtual_key[i].y_range_max);
+	}
+}
+
+int himax_parse_dt(struct himax_ts_data *ts,
+					struct himax_i2c_platform_data *pdata)
+{
+	int rc, coords_size = 0;
+	uint32_t coords[4] = {0};
+	struct property *prop;
+	struct device_node *dt = private_ts->client->dev.of_node;
+	u32 data = 0;
+
+
+	prop = of_find_property(dt, "himax,panel-coords", NULL);
+
+	if (prop) {
+		coords_size = prop->length / sizeof(u32);
+
+		if (coords_size != 4)
+			D(" %s:Invalid panel coords size %d\n", __func__, coords_size);
+	}
+
+	if (of_property_read_u32_array(dt, "himax,panel-coords", coords, coords_size) == 0) {
+		pdata->abs_x_min = coords[0], pdata->abs_x_max = (coords[1] - 1);
+		pdata->abs_y_min = coords[2], pdata->abs_y_max = (coords[3] - 1);
+		I(" DT-%s:panel-coords = %d, %d, %d, %d\n", __func__, pdata->abs_x_min,
+		  pdata->abs_x_max, pdata->abs_y_min, pdata->abs_y_max);
+	}
+
+	prop = of_find_property(dt, "himax,display-coords", NULL);
+
+	if (prop) {
+		coords_size = prop->length / sizeof(u32);
+
+		if (coords_size != 4)
+			D(" %s:Invalid display coords size %d\n", __func__, coords_size);
+	}
+
+	rc = of_property_read_u32_array(dt, "himax,display-coords", coords, coords_size);
+
+	if (rc && (rc != -EINVAL)) {
+		D(" %s:Fail to read display-coords %d\n", __func__, rc);
+		return rc;
+	}
+
+	pdata->screenWidth  = coords[1];
+	pdata->screenHeight = coords[3];
+	I(" DT-%s:display-coords = (%d, %d)\n", __func__, pdata->screenWidth,
+	  pdata->screenHeight);
+	pdata->gpio_irq = of_get_named_gpio(dt, "himax,irq-gpio", 0);
+
+	if (!gpio_is_valid(pdata->gpio_irq))
+		I(" DT:gpio_irq value is not valid\n");
+
+#ifdef HX_SHARP_ENABLE_PON
+	pdata->gpio_reset = 262;
+#else
+	pdata->gpio_reset = of_get_named_gpio(dt, "himax,rst-gpio", 0);
+#endif
+
+	if (!gpio_is_valid(pdata->gpio_reset))
+		I(" DT:gpio_rst value is not valid\n");
+
+#ifdef HX_SHARP_ENABLE_PON
+	pdata->gpio_pon = of_get_named_gpio(dt, "himax,pon-gpio", 0);
+
+	if (!gpio_is_valid(pdata->gpio_pon))
+		I(" DT:gpio_pon value is not valid\n");
+
+
+	I(" DT:pdata->gpio_pon=%d\n", pdata->gpio_pon);
+
+#endif
+
+	pdata->gpio_3v3_en = of_get_named_gpio(dt, "himax,3v3-gpio", 0);
+
+	if (!gpio_is_valid(pdata->gpio_3v3_en))
+		I(" DT:gpio_3v3_en value is not valid\n");
+
+	I(" DT:gpio_irq=%d, gpio_rst=%d, gpio_3v3_en=%d\n", pdata->gpio_irq, pdata->gpio_reset, pdata->gpio_3v3_en);
+
+	if (of_property_read_u32(dt, "report_type", &data) == 0) {
+		pdata->protocol_type = data;
+		I(" DT:protocol_type=%d\n", pdata->protocol_type);
+	}
+
+	himax_vk_parser(dt, pdata);
+	return 0;
+}
+EXPORT_SYMBOL(himax_parse_dt);
+
+int himax_bus_read(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry)
+{
+	int retry;
+	struct i2c_client *client = private_ts->client;
+	struct i2c_msg msg[] = {
+		{
+			.addr = client->addr,
+			.flags = 0,
+			.len = 1,
+			.buf = &command,
+		},
+		{
+			.addr = client->addr,
+			.flags = I2C_M_RD,
+			.len = length,
+			.buf = data,
+		}
+	};
+	mutex_lock(&private_ts->rw_lock);
+
+	for (retry = 0; retry < toRetry; retry++) {
+		if (i2c_transfer(client->adapter, msg, 2) == 2)
+			break;
+
+		/*msleep(20);*/
+	}
+
+	if (retry == toRetry) {
+		E("%s: i2c_read_block retry over %d\n",
+		  __func__, toRetry);
+		i2c_error_count = toRetry;
+		mutex_unlock(&private_ts->rw_lock);
+		return -EIO;
+	}
+
+	mutex_unlock(&private_ts->rw_lock);
+	return 0;
+}
+EXPORT_SYMBOL(himax_bus_read);
+
+int himax_bus_write(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry)
+{
+	int retry/*, loop_i*/;
+	uint8_t buf[length + 1];
+	struct i2c_client *client = private_ts->client;
+	struct i2c_msg msg[] = {
+		{
+			.addr = client->addr,
+			.flags = 0,
+			.len = length + 1,
+			.buf = buf,
+		}
+	};
+
+
+	mutex_lock(&private_ts->rw_lock);
+	buf[0] = command;
+	memcpy(buf + 1, data, length);
+
+	for (retry = 0; retry < toRetry; retry++) {
+		if (i2c_transfer(client->adapter, msg, 1) == 1)
+			break;
+
+		/*msleep(20);*/
+	}
+
+	if (retry == toRetry) {
+		E("%s: i2c_write_block retry over %d\n",
+		  __func__, toRetry);
+		i2c_error_count = toRetry;
+		mutex_unlock(&private_ts->rw_lock);
+		return -EIO;
+	}
+
+	mutex_unlock(&private_ts->rw_lock);
+	return 0;
+}
+EXPORT_SYMBOL(himax_bus_write);
+
+int himax_bus_write_command(uint8_t command, uint8_t toRetry)
+{
+	return himax_bus_write(command, NULL, 0, toRetry);
+}
+
+int himax_bus_master_write(uint8_t *data, uint32_t length, uint8_t toRetry)
+{
+	int retry/*, loop_i*/;
+	uint8_t buf[length];
+	struct i2c_client *client = private_ts->client;
+	struct i2c_msg msg[] = {
+		{
+			.addr = client->addr,
+			.flags = 0,
+			.len = length,
+			.buf = buf,
+		}
+	};
+
+
+	mutex_lock(&private_ts->rw_lock);
+	memcpy(buf, data, length);
+
+	for (retry = 0; retry < toRetry; retry++) {
+		if (i2c_transfer(client->adapter, msg, 1) == 1)
+			break;
+
+		/*msleep(20);*/
+	}
+
+	if (retry == toRetry) {
+		E("%s: i2c_write_block retry over %d\n",
+		  __func__, toRetry);
+		i2c_error_count = toRetry;
+		mutex_unlock(&private_ts->rw_lock);
+		return -EIO;
+	}
+
+	mutex_unlock(&private_ts->rw_lock);
+	return 0;
+}
+EXPORT_SYMBOL(himax_bus_master_write);
+
+void himax_int_enable(int enable)
+{
+	int irqnum = 0;
+
+
+	irqnum = private_ts->client->irq;
+
+	if (enable == 1 && irq_enable_count == 0) {
+		enable_irq(irqnum);
+		irq_enable_count = 1;
+		private_ts->irq_enabled = 1;
+	} else if (enable == 0 && irq_enable_count == 1) {
+		disable_irq_nosync(irqnum);
+		irq_enable_count = 0;
+		private_ts->irq_enabled = 0;
+	}
+
+	I("irq_enable_count = %d\n", irq_enable_count);
+}
+EXPORT_SYMBOL(himax_int_enable);
+
+#ifdef HX_RST_PIN_FUNC
+void himax_rst_gpio_set(int pinnum, uint8_t value)
+{
+	gpio_direction_output(pinnum, value);
+}
+EXPORT_SYMBOL(himax_rst_gpio_set);
+#endif
+
+uint8_t himax_int_gpio_read(int pinnum)
+{
+	return gpio_get_value(pinnum);
+}
+
+#if defined(CONFIG_HMX_DB)
+static int himax_regulator_configure(struct himax_i2c_platform_data *pdata)
+{
+	int retval;
+	struct i2c_client *client = private_ts->client;
+
+
+	pdata->vcc_dig = regulator_get(&client->dev, "vdd");
+
+	if (IS_ERR(pdata->vcc_dig)) {
+		E("%s: Failed to get regulator vdd\n",
+		  __func__);
+		retval = PTR_ERR(pdata->vcc_dig);
+		return retval;
+	}
+
+	pdata->vcc_ana = regulator_get(&client->dev, "avdd");
+
+	if (IS_ERR(pdata->vcc_ana)) {
+		E("%s: Failed to get regulator avdd\n",
+		  __func__);
+		retval = PTR_ERR(pdata->vcc_ana);
+		regulator_put(pdata->vcc_dig);
+		return retval;
+	}
+
+	return 0;
+};
+
+static void himax_regulator_deinit(struct himax_i2c_platform_data *pdata)
+{
+	I("%s: entered.\n", __func__);
+
+	if (!IS_ERR(pdata->vcc_ana))
+		regulator_put(pdata->vcc_ana);
+
+	if (!IS_ERR(pdata->vcc_dig))
+		regulator_put(pdata->vcc_dig);
+
+	I("%s: regulator put, completed.\n", __func__);
+};
+
+static int himax_power_on(struct himax_i2c_platform_data *pdata, bool on)
+{
+	int retval;
+
+	if (on) {
+		retval = regulator_enable(pdata->vcc_dig);
+
+		if (retval) {
+			E("%s: Failed to enable regulator vdd\n",
+			  __func__);
+			return retval;
+		}
+
+		/*msleep(100);*/
+		usleep_range(1000, 1001);
+		retval = regulator_enable(pdata->vcc_ana);
+
+		if (retval) {
+			E("%s: Failed to enable regulator avdd\n",
+			  __func__);
+			regulator_disable(pdata->vcc_dig);
+			return retval;
+		}
+	} else {
+		regulator_disable(pdata->vcc_dig);
+		regulator_disable(pdata->vcc_ana);
+	}
+
+	return 0;
+}
+
+int himax_gpio_power_config(struct himax_i2c_platform_data *pdata)
+{
+	int error;
+	struct i2c_client *client = private_ts->client;
+
+
+	error = himax_regulator_configure(pdata);
+
+	if (error) {
+		E("Failed to intialize hardware\n");
+		goto err_regulator_not_on;
+	}
+
+#ifdef HX_RST_PIN_FUNC
+
+	if (gpio_is_valid(pdata->gpio_reset)) {
+		/* configure touchscreen reset out gpio */
+		error = gpio_request(pdata->gpio_reset, "hmx_reset_gpio");
+
+		if (error) {
+			E("unable to request gpio [%d]\n", pdata->gpio_reset);
+			goto err_regulator_on;
+		}
+
+		error = gpio_direction_output(pdata->gpio_reset, 0);
+
+		if (error) {
+			E("unable to set direction for gpio [%d]\n",
+			  pdata->gpio_reset);
+			goto err_gpio_reset_req;
+		}
+	}
+
+#endif
+	error = himax_power_on(pdata, true);
+
+	if (error) {
+		E("Failed to power on hardware\n");
+		goto err_power_on;
+	}
+
+	if (gpio_is_valid(pdata->gpio_irq)) {
+		/* configure touchscreen irq gpio */
+		error = gpio_request(pdata->gpio_irq, "hmx_gpio_irq");
+
+		if (error) {
+			E("unable to request gpio [%d]\n",
+			  pdata->gpio_irq);
+			goto err_req_irq_gpio;
+		}
+
+		error = gpio_direction_input(pdata->gpio_irq);
+
+		if (error) {
+			E("unable to set direction for gpio [%d]\n",
+			  pdata->gpio_irq);
+			goto err_set_gpio_irq;
+		}
+
+		client->irq = gpio_to_irq(pdata->gpio_irq);
+		private_ts->hx_irq = client->irq;
+	} else {
+		E("irq gpio not provided\n");
+		goto err_req_irq_gpio;
+	}
+
+	/*msleep(20);*/
+	usleep_range(2000, 2001);
+#ifdef HX_RST_PIN_FUNC
+
+	if (gpio_is_valid(pdata->gpio_reset)) {
+		error = gpio_direction_output(pdata->gpio_reset, 1);
+
+		if (error) {
+			E("unable to set direction for gpio [%d]\n",
+			  pdata->gpio_reset);
+			goto err_set_gpio_irq;
+		}
+	}
+
+#endif
+	return 0;
+err_set_gpio_irq:
+
+	if (gpio_is_valid(pdata->gpio_irq))
+		gpio_free(pdata->gpio_irq);
+
+err_req_irq_gpio:
+	himax_power_on(pdata, false);
+err_power_on:
+#ifdef HX_RST_PIN_FUNC
+err_gpio_reset_req:
+	if (gpio_is_valid(pdata->gpio_reset))
+		gpio_free(pdata->gpio_reset);
+
+err_regulator_on:
+#endif
+	himax_regulator_deinit(pdata);
+err_regulator_not_on:
+	return error;
+}
+
+#else
+int himax_gpio_power_config(struct himax_i2c_platform_data *pdata)
+{
+	int error = 0;
+	struct i2c_client *client = private_ts->client;
+#ifdef HX_RST_PIN_FUNC
+
+	if (pdata->gpio_reset >= 0) {
+		error = gpio_request(pdata->gpio_reset, "himax-reset");
+
+		if (error < 0) {
+			E("%s: request reset pin failed\n", __func__);
+			goto err_gpio_reset_req;
+		}
+
+		error = gpio_direction_output(pdata->gpio_reset, 0);
+
+		if (error) {
+			E("unable to set direction for gpio [%d]\n",
+			  pdata->gpio_reset);
+			goto err_gpio_reset_dir;
+		}
+	}
+
+#endif
+
+#ifdef HX_SHARP_ENABLE_PON
+	if (gpio_is_valid(pdata->gpio_pon)) {
+		error = gpio_request(pdata->gpio_pon, "hmx_pon_gpio");
+
+		if (error) {
+			E("unable to request scl gpio [%d]\n", pdata->gpio_pon);
+			goto err_gpio_pon_req;
+		}
+
+		error = gpio_direction_output(pdata->gpio_pon, 0);
+
+		I("gpio_pon LOW [%d]\n", pdata->gpio_pon);
+
+		if (error) {
+			E("unable to set direction for pon gpio [%d]\n", pdata->gpio_pon);
+			goto err_gpio_pon_dir;
+		}
+	}
+#endif
+
+
+	if (pdata->gpio_3v3_en >= 0) {
+		error = gpio_request(pdata->gpio_3v3_en, "himax-3v3_en");
+
+		if (error < 0) {
+			E("%s: request 3v3_en pin failed\n", __func__);
+			goto err_gpio_3v3_req;
+		}
+
+		gpio_direction_output(pdata->gpio_3v3_en, 1);
+		I("3v3_en set 1 get pin = %d\n", gpio_get_value(pdata->gpio_3v3_en));
+	}
+
+	if (gpio_is_valid(pdata->gpio_irq)) {
+		/* configure touchscreen irq gpio */
+		error = gpio_request(pdata->gpio_irq, "himax_gpio_irq");
+
+		if (error) {
+			E("unable to request gpio [%d]\n", pdata->gpio_irq);
+			goto err_gpio_irq_req;
+		}
+
+		error = gpio_direction_input(pdata->gpio_irq);
+
+		if (error) {
+			E("unable to set direction for gpio [%d]\n", pdata->gpio_irq);
+			goto err_gpio_irq_set_input;
+		}
+
+		client->irq = gpio_to_irq(pdata->gpio_irq);
+		private_ts->hx_irq = client->irq;
+	} else {
+		E("irq gpio not provided\n");
+		goto err_gpio_irq_req;
+	}
+#ifdef HX_SHARP_ENABLE_PON
+	msleep(20);
+#else
+	usleep_range(2000, 2001);
+#endif
+
+#ifdef HX_RST_PIN_FUNC
+
+	if (pdata->gpio_reset >= 0) {
+		error = gpio_direction_output(pdata->gpio_reset, 1);
+
+		if (error) {
+			E("unable to set direction for gpio [%d]\n",
+			  pdata->gpio_reset);
+			goto err_gpio_reset_set_high;
+		}
+	}
+#endif
+
+#ifdef HX_SHARP_ENABLE_PON
+	msleep(800);
+
+	if (gpio_is_valid(pdata->gpio_pon)) {
+
+		error = gpio_direction_output(pdata->gpio_pon, 1);
+
+		I("gpio_pon HIGH [%d]\n", pdata->gpio_pon);
+
+		if (error) {
+			E("gpio_pon unable to set direction for gpio [%d]\n", pdata->gpio_pon);
+			goto err_gpio_pon_set_high;
+		}
+	}
+#endif
+	return error;
+
+#ifdef HX_SHARP_ENABLE_PON
+err_gpio_pon_set_high:
+#endif
+#ifdef HX_RST_PIN_FUNC
+err_gpio_reset_set_high:
+#endif
+err_gpio_irq_set_input:
+	if (gpio_is_valid(pdata->gpio_irq))
+		gpio_free(pdata->gpio_irq);
+err_gpio_irq_req:
+	if (pdata->gpio_3v3_en >= 0)
+		gpio_free(pdata->gpio_3v3_en);
+err_gpio_3v3_req:
+#ifdef HX_SHARP_ENABLE_PON
+err_gpio_pon_dir:
+	if (gpio_is_valid(pdata->gpio_pon))
+		gpio_free(pdata->gpio_pon);
+err_gpio_pon_req:
+#endif
+#ifdef HX_RST_PIN_FUNC
+err_gpio_reset_dir:
+	if (pdata->gpio_reset >= 0)
+		gpio_free(pdata->gpio_reset);
+err_gpio_reset_req:
+#endif
+	return error;
+}
+
+#endif
+
+void himax_gpio_power_deconfig(struct himax_i2c_platform_data *pdata)
+{
+	if (gpio_is_valid(pdata->gpio_irq))
+		gpio_free(pdata->gpio_irq);
+
+#ifdef HX_RST_PIN_FUNC
+	if (gpio_is_valid(pdata->gpio_reset))
+		gpio_free(pdata->gpio_reset);
+#endif
+
+#if defined(CONFIG_HMX_DB)
+	himax_power_on(pdata, false);
+	himax_regulator_deinit(pdata);
+#else
+	if (pdata->gpio_3v3_en >= 0)
+		gpio_free(pdata->gpio_3v3_en);
+
+#ifdef HX_SHARP_ENABLE_PON
+	if (gpio_is_valid(pdata->gpio_pon))
+		gpio_free(pdata->gpio_pon);
+#endif
+
+#endif
+}
+
+static void himax_ts_isr_func(struct himax_ts_data *ts)
+{
+	himax_ts_work(ts);
+}
+
+irqreturn_t himax_ts_thread(int irq, void *ptr)
+{
+	himax_ts_isr_func((struct himax_ts_data *)ptr);
+
+	return IRQ_HANDLED;
+}
+
+static void himax_ts_work_func(struct work_struct *work)
+{
+	struct himax_ts_data *ts = container_of(work, struct himax_ts_data, work);
+
+
+	himax_ts_work(ts);
+}
+
+int himax_int_register_trigger(void)
+{
+	int ret = 0;
+	struct himax_ts_data *ts = private_ts;
+	struct i2c_client *client = private_ts->client;
+
+	if (ic_data->HX_INT_IS_EDGE) {
+		I("%s edge triiger falling\n ", __func__);
+		ret = request_threaded_irq(client->irq, NULL, himax_ts_thread, IRQF_TRIGGER_FALLING | IRQF_ONESHOT, client->name, ts);
+	}
+
+	else {
+		I("%s level trigger low\n ", __func__);
+		ret = request_threaded_irq(client->irq, NULL, himax_ts_thread, IRQF_TRIGGER_LOW | IRQF_ONESHOT, client->name, ts);
+	}
+
+	return ret;
+}
+
+int himax_int_en_set(void)
+{
+	int ret = NO_ERR;
+
+
+	ret = himax_int_register_trigger();
+	return ret;
+}
+
+int himax_ts_register_interrupt(void)
+{
+	struct himax_ts_data *ts = private_ts;
+	struct i2c_client *client = private_ts->client;
+	int ret = 0;
+
+
+	ts->irq_enabled = 0;
+
+	/* Work functon */
+	if (client->irq && private_ts->hx_irq) {/*INT mode*/
+		ts->use_irq = 1;
+		ret = himax_int_register_trigger();
+
+		if (ret == 0) {
+			ts->irq_enabled = 1;
+			irq_enable_count = 1;
+			I("%s: irq enabled at gpio: %d\n", __func__, client->irq);
+#ifdef HX_SMART_WAKEUP
+			irq_set_irq_wake(client->irq, 1);
+#endif
+		} else {
+			ts->use_irq = 0;
+			E("%s: request_irq failed\n", __func__);
+		}
+	} else {
+		I("%s: client->irq is empty, use polling mode.\n", __func__);
+	}
+
+	if (!ts->use_irq) {/*if use polling mode need to disable HX_ESD_RECOVERY function*/
+		ts->himax_wq = create_singlethread_workqueue("himax_touch");
+		INIT_WORK(&ts->work, himax_ts_work_func);
+		hrtimer_init(&ts->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+		ts->timer.function = himax_ts_timer_func;
+		hrtimer_start(&ts->timer, ktime_set(1, 0), HRTIMER_MODE_REL);
+		I("%s: polling mode enabled\n", __func__);
+	}
+
+	return ret;
+}
+
+int himax_ts_unregister_interrupt(void)
+{
+	struct himax_ts_data *ts = private_ts;
+	int ret = 0;
+
+
+	I("%s: entered.\n", __func__);
+
+	/* Work functon */
+	if (private_ts->hx_irq && ts->use_irq) {/*INT mode*/
+#ifdef HX_SMART_WAKEUP
+		irq_set_irq_wake(ts->hx_irq, 0);
+#endif
+		free_irq(ts->hx_irq, ts);
+		I("%s: irq disabled at qpio: %d\n", __func__, private_ts->hx_irq);
+	}
+
+	if (!ts->use_irq) {/*if use polling mode need to disable HX_ESD_RECOVERY function*/
+		hrtimer_cancel(&ts->timer);
+		cancel_work_sync(&ts->work);
+		if (ts->himax_wq != NULL)
+			destroy_workqueue(ts->himax_wq);
+		I("%s: polling mode destroyed", __func__);
+	}
+
+	return ret;
+}
+
+static int himax_common_suspend(struct device *dev)
+{
+	struct himax_ts_data *ts = dev_get_drvdata(dev);
+
+
+	I("%s: enter\n", __func__);
+	himax_chip_common_suspend(ts);
+	return 0;
+}
+
+static int himax_common_resume(struct device *dev)
+{
+	struct himax_ts_data *ts = dev_get_drvdata(dev);
+
+
+	I("%s: enter\n", __func__);
+	himax_chip_common_resume(ts);
+	return 0;
+}
+
+#if defined(CONFIG_FB)
+int fb_notifier_callback(struct notifier_block *self,
+							unsigned long event, void *data)
+{
+	struct fb_event *evdata = data;
+	int *blank;
+	struct himax_ts_data *ts =
+	    container_of(self, struct himax_ts_data, fb_notif);
+
+
+	I(" %s\n", __func__);
+
+	if (evdata && evdata->data && event == FB_EVENT_BLANK && ts &&
+	    ts->client) {
+		blank = evdata->data;
+
+		switch (*blank) {
+		case FB_BLANK_UNBLANK:
+			himax_common_resume(&ts->client->dev);
+			break;
+		case FB_BLANK_POWERDOWN:
+		case FB_BLANK_HSYNC_SUSPEND:
+		case FB_BLANK_VSYNC_SUSPEND:
+		case FB_BLANK_NORMAL:
+			himax_common_suspend(&ts->client->dev);
+			break;
+		}
+	}
+
+	return 0;
+}
+#endif
+
+int himax_chip_common_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	int ret = 0;
+	struct himax_ts_data *ts;
+
+	I("%s:Enter\n", __func__);
+
+	/* Check I2C functionality */
+	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+		E("%s: i2c check functionality error\n", __func__);
+		ret = -ENODEV;
+		goto err_check_functionality_failed;
+	}
+
+	ts = kzalloc(sizeof(struct himax_ts_data), GFP_KERNEL);
+	if (ts == NULL) {
+		E("%s: allocate himax_ts_data failed\n", __func__);
+		ret = -ENOMEM;
+		goto err_alloc_data_failed;
+	}
+
+	i2c_set_clientdata(client, ts);
+	ts->client = client;
+	ts->dev = &client->dev;
+	mutex_init(&ts->rw_lock);
+	private_ts = ts;
+
+	ret = himax_chip_common_init();
+
+err_alloc_data_failed:
+err_check_functionality_failed:
+
+	return ret;
+}
+
+int himax_chip_common_remove(struct i2c_client *client)
+{
+	if (g_hx_chip_inited)
+		himax_chip_common_deinit();
+
+	return 0;
+}
+
+static const struct i2c_device_id himax_common_ts_id[] = {
+	{HIMAX_common_NAME, 0 },
+	{}
+};
+
+static const struct dev_pm_ops himax_common_pm_ops = {
+#if (!defined(CONFIG_FB))
+	.suspend = himax_common_suspend,
+	.resume  = himax_common_resume,
+#endif
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id himax_match_table[] = {
+	{.compatible = "himax,hxcommon" },
+	{},
+};
+#else
+#define himax_match_table NULL
+#endif
+
+static struct i2c_driver himax_common_driver = {
+	.id_table	= himax_common_ts_id,
+	.probe		= himax_chip_common_probe,
+	.remove		= himax_chip_common_remove,
+	.driver		= {
+		.name = HIMAX_common_NAME,
+		.owner = THIS_MODULE,
+		.of_match_table = himax_match_table,
+#ifdef CONFIG_PM
+		.pm				= &himax_common_pm_ops,
+#endif
+	},
+};
+
+static int __init himax_common_init(void)
+{
+	I("Himax common touch panel driver init\n");
+	D("Himax check double loading\n");
+	if (g_mmi_refcnt++ > 0) {
+
+		I("Himax driver has been loaded! ignoring....\n");
+
+		return 0;
+	}
+	i2c_add_driver(&himax_common_driver);
+
+	return 0;
+}
+
+static void __exit himax_common_exit(void)
+{
+	i2c_del_driver(&himax_common_driver);
+}
+
+module_init(himax_common_init);
+module_exit(himax_common_exit);
+
+MODULE_DESCRIPTION("Himax_common driver");
+MODULE_LICENSE("GPL");
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_I2C.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_I2C.h
@ -0,0 +1,144 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for QCT platform
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef HIMAX_PLATFORM_H
+#define HIMAX_PLATFORM_H
+
+#include "himax_common.h"
+
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/gpio.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+
+#if defined(CONFIG_HMX_DB)
+	#include <linux/regulator/consumer.h>
+#endif
+
+
+#define HIMAX_I2C_RETRY_TIMES 3
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
+#define D(x...) pr_debug("[HXTP] " x)
+#define I(x...) pr_info("[HXTP] " x)
+#define W(x...) pr_warn("[HXTP][WARNING] " x)
+#define E(x...) pr_err("[HXTP][ERROR] " x)
+#define DIF(x...) \
+do { \
+	if (debug_flag) \
+		pr_debug("[HXTP][DEBUG] " x) \
+	} while (0)
+#else
+
+#define D(x...)
+#define I(x...)
+#define W(x...)
+#define E(x...)
+#define DIF(x...)
+#endif
+
+#if defined(CONFIG_HMX_DB)
+
+	/* Analog voltage @2.7 V */
+	#define HX_VTG_MIN_UV			2700000
+	#define HX_VTG_MAX_UV			3300000
+	#define HX_ACTIVE_LOAD_UA		15000
+	#define HX_LPM_LOAD_UA			10
+	/* Digital voltage @1.8 V */
+	#define HX_VTG_DIG_MIN_UV		1800000
+	#define HX_VTG_DIG_MAX_UV		1800000
+	#define HX_ACTIVE_LOAD_DIG_UA	10000
+	#define HX_LPM_LOAD_DIG_UA		10
+	#define HX_I2C_VTG_MIN_UV		1800000
+	#define HX_I2C_VTG_MAX_UV		1800000
+	#define HX_I2C_LOAD_UA			10000
+	#define HX_I2C_LPM_LOAD_UA		10
+
+#endif
+
+#define HIMAX_common_NAME			"himax_tp"
+#define HIMAX_I2C_ADDR				0x48
+#define INPUT_DEV_NAME				"himax-touchscreen"
+
+struct himax_i2c_platform_data {
+	int abs_x_min;
+	int abs_x_max;
+	int abs_x_fuzz;
+	int abs_y_min;
+	int abs_y_max;
+	int abs_y_fuzz;
+	int abs_pressure_min;
+	int abs_pressure_max;
+	int abs_pressure_fuzz;
+	int abs_width_min;
+	int abs_width_max;
+	int screenWidth;
+	int screenHeight;
+	uint8_t fw_version;
+	uint8_t tw_id;
+	uint8_t powerOff3V3;
+	uint8_t cable_config[2];
+	uint8_t protocol_type;
+	int gpio_irq;
+	int gpio_reset;
+	int gpio_3v3_en;
+	int gpio_pon;
+	int (*power)(int on);
+	void (*reset)(void);
+	struct himax_virtual_key *virtual_key;
+	struct kobject *vk_obj;
+	struct kobj_attribute *vk2Use;
+	int hx_config_size;
+
+#if defined(CONFIG_HMX_DB)
+	bool	i2c_pull_up;
+	bool	digital_pwr_regulator;
+	int reset_gpio;
+	u32 reset_gpio_flags;
+	int irq_gpio;
+	u32 irq_gpio_flags;
+	struct regulator *vcc_ana; /* For Dragon Board */
+	struct regulator *vcc_dig; /* For Dragon Board */
+	struct regulator *vcc_i2c; /* For Dragon Board */
+
+#endif
+
+};
+
+extern int irq_enable_count;
+extern int himax_bus_read(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
+extern int himax_bus_write(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
+extern int himax_bus_write_command(uint8_t command, uint8_t toRetry);
+extern int himax_bus_master_write(uint8_t *data, uint32_t length, uint8_t toRetry);
+extern void himax_int_enable(int enable);
+extern int himax_ts_register_interrupt(void);
+int himax_ts_unregister_interrupt(void);
+extern uint8_t himax_int_gpio_read(int pinnum);
+extern int himax_gpio_power_config(struct himax_i2c_platform_data *pdata);
+void himax_gpio_power_deconfig(struct himax_i2c_platform_data *pdata);
+
+#if defined(CONFIG_FB)
+	extern int fb_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
+#endif
+
+extern void himax_ts_work(struct himax_ts_data *ts);
+extern enum hrtimer_restart himax_ts_timer_func(struct hrtimer *timer);
+extern int himax_chip_common_init(void);
+extern void himax_chip_common_deinit(void);
+
+#endif
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_SPI.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_SPI.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_SPI.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/himax_platform_QCT_SPI.h
@ -0,0 +1,147 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for QCT platform
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef HIMAX_PLATFORM_H
+#define HIMAX_PLATFORM_H
+
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/gpio.h>
+#include <linux/types.h>
+#include <linux/spi/spi.h>
+#include <linux/interrupt.h>
+#if defined(CONFIG_HMX_DB)
+	#include <linux/regulator/consumer.h>
+#endif
+
+#define HIMAX_I2C_RETRY_TIMES 3
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
+#define D(x...) pr_debug("[HXTP] " x)
+#define I(x...) pr_info("[HXTP] " x)
+#define W(x...) pr_warn("[HXTP][WARNING] " x)
+#define E(x...) pr_err("[HXTP][ERROR] " x)
+#define DIF(x...) \
+do { \
+	if (debug_flag) \
+		pr_debug("[HXTP][DEBUG] " x) \
+	} while (0)
+#else
+#define D(x...)
+#define I(x...)
+#define W(x...)
+#define E(x...)
+#define DIF(x...)
+#endif
+
+#if defined(CONFIG_HMX_DB)
+	/* Analog voltage @2.7 V */
+	#define HX_VTG_MIN_UV	2700000
+	#define HX_VTG_MAX_UV	3300000
+	#define HX_ACTIVE_LOAD_UA	15000
+	#define HX_LPM_LOAD_UA	10
+	/* Digital voltage @1.8 V */
+	#define HX_VTG_DIG_MIN_UV	1800000
+	#define HX_VTG_DIG_MAX_UV	1800000
+	#define HX_ACTIVE_LOAD_DIG_UA	10000
+	#define HX_LPM_LOAD_DIG_UA	10
+
+	#define HX_I2C_VTG_MIN_UV	1800000
+	#define HX_I2C_VTG_MAX_UV	1800000
+	#define HX_I2C_LOAD_UA	10000
+	#define HX_I2C_LPM_LOAD_UA	10
+#endif
+
+#define HIMAX_common_NAME	"himax_tp"
+#define HIMAX_I2C_ADDR	0x48
+#define INPUT_DEV_NAME	"himax-touchscreen"
+#define PACKET_MAX_SZ 4096
+#define GBUFFER_SZ PACKET_MAX_SZ - 2
+
+struct himax_i2c_platform_data {
+	int abs_x_min;
+	int abs_x_max;
+	int abs_x_fuzz;
+	int abs_y_min;
+	int abs_y_max;
+	int abs_y_fuzz;
+	int abs_pressure_min;
+	int abs_pressure_max;
+	int abs_pressure_fuzz;
+	int abs_width_min;
+	int abs_width_max;
+	int screenWidth;
+	int screenHeight;
+	uint8_t fw_version;
+	uint8_t tw_id;
+	uint8_t powerOff3V3;
+	uint8_t cable_config[2];
+	uint8_t protocol_type;
+	int gpio_irq;
+	int gpio_reset;
+	int gpio_3v3_en;
+	char panel_supplier[16];
+	int (*power)(int on);
+	void (*reset)(void);
+	struct himax_virtual_key *virtual_key;
+	struct kobject *vk_obj;
+	struct kobj_attribute *vk2Use;
+
+	int hx_config_size;
+#if defined(CONFIG_HMX_DB)
+	bool	i2c_pull_up;
+	bool	digital_pwr_regulator;
+	int reset_gpio;
+	u32 reset_gpio_flags;
+	int irq_gpio;
+	u32 irq_gpio_flags;
+
+	struct regulator *vcc_ana; /* For Dragon Board */
+	struct regulator *vcc_dig; /* For Dragon Board */
+	struct regulator *vcc_i2c; /* For Dragon Board */
+#endif
+};
+
+extern struct himax_ic_data *ic_data;
+extern struct himax_ts_data *private_ts;
+int himax_chip_common_init(void);
+void himax_chip_common_deinit(void);
+
+void himax_ts_work(struct himax_ts_data *ts);
+enum hrtimer_restart himax_ts_timer_func(struct hrtimer *timer);
+extern int irq_enable_count;
+extern int himax_bus_read(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
+extern int himax_bus_write(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
+extern int himax_bus_write_command(uint8_t command, uint8_t toRetry);
+extern int himax_bus_master_write(uint8_t *data, uint32_t length, uint8_t toRetry);
+extern void himax_int_enable(int enable);
+extern int himax_ts_register_interrupt(void);
+int himax_ts_unregister_interrupt(void);
+extern uint8_t himax_int_gpio_read(int pinnum);
+
+extern int himax_gpio_power_config(struct himax_i2c_platform_data *pdata);
+void himax_gpio_power_deconfig(struct himax_i2c_platform_data *pdata);
+
+#ifdef HIMAX_CONFIG_PANEL_NOTIFICATIONS
+extern int panel_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
+#endif
+
+#if defined(CONFIG_DRM)
+	extern int drm_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
+#elif defined(CONFIG_FB)
+	extern int fb_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
+#endif
+
+#endif
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/Android.mk
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/Android.mk
@ -0,0 +1,17 @@
+DLKM_DIR := motorola/kernel/modules
+LOCAL_PATH := $(call my-dir)
+
+ifeq ($(DLKM_INSTALL_TO_VENDOR_OUT),true)
+HIMAX_MMI_IC_MODULE_PATH := $(TARGET_OUT_VENDOR)/lib/modules/
+else
+HIMAX_MMI_IC_MODULE_PATH := $(KERNEL_MODULES_OUT)
+endif
+
+KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME=hx83102
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := himax_0flash_mmi_hx83102.ko
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_PATH := $(HIMAX_MMI_IC_MODULE_PATH)
+LOCAL_REQUIRED_MODULES := himax_0flash_mmi.ko
+include $(DLKM_DIR)/AndroidKernelModule.mk
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/Kbuild
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/Kbuild
@ -0,0 +1,18 @@
+# add -Wall to try to catch everything we can.
+EXTRA_CFLAGS += -Wall
+EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG \
+		-DCONFIG_TOUCHSCREEN_HIMAX_INSPECT
+
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_INCELL
+EXTRA_CFLAGS += -DCONFIG_HMX_DB
+
+ifneq ($(filter hx83102,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83102_MOD__
+endif
+
+obj-m := himax_0flash_mmi_hx83102.o
+himax_0flash_mmi_hx83102-objs += himax_ic_HX83102.o
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/Makefile
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/Makefile
@ -0,0 +1,10 @@
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+
+all:
+	$(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS)
+
+modules_install:
+	$(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/himax_ic_HX83102.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/himax_ic_HX83102.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/himax_ic_HX83102.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102/himax_ic_HX83102.h
@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for HX83102 chipset
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include "himax_ic_core.h"
+#include <linux/slab.h>
+
+#define hx83102ab_fw_addr_sorting_mode_en		0x100007FC
+#define hx83102ab_fw_addr_selftest_addr_en		0x100007F8
+#define hx83102ab_data_adc_cfg_1			0x10007B00
+#define hx83102a_data_df_rx		48
+#define hx83102a_data_df_tx		24
+#define hx83102a_data_df_x_res		2160
+#define hx83102a_data_df_y_res		3840
+#define hx83102b_data_df_x_res		720
+#define hx83102b_data_df_y_res		1280
+
+#define hx83102d_fw_addr_raw_out_sel			0x800204f4
+#define hx83102d_zf_data_adc_cfg_1 0x10007B00
+#define hx83102d_zf_data_adc_cfg_2 0x10006A00
+#define hx83102d_zf_data_adc_cfg_3 0x10007500
+#define hx83102d_zf_data_bor_prevent_info 0x10007268
+#define hx83102d_zf_data_notch_info 0x10007300
+#define hx83102d_zf_func_info_en 0x10007FD0
+#define hx83102d_zf_po_sub_func 0x10005A00
+#define hx83102d_zf_data_sram_start_addr 0x20000000
+#define hx83102d_data_df_x_res		720
+#define hx83102d_data_df_y_res		1280
+#define hx83102d_adr_osc_en 0x9000009C
+#define hx83102d_adr_osc_pw 0x90000280
+
+#define hx83102e_fw_addr_raw_out_sel			0x100072EC
+#define hx83102e_data_df_rx		48
+#define hx83102e_data_df_tx		30
+#define hx83102e_data_df_x_res		1200
+#define hx83102e_data_df_y_res		1920
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#ifdef HX_EN_DYNAMIC_NAME
+#define hx83102_ic_b9_en        0x300B9000
+#define hx83102_ic_fw           0x300E8006
+
+#define hx83102b_ic_osc_en       0x900880A0
+#define hx83102d_ic_osc_en       0x9000009C
+#define hx83102d_ic_osc_pw       0x90000280
+#endif
+#endif
+
+#ifdef HX_ESD_RECOVERY
+	extern u8 HX_ESD_RESET_ACTIVATE;
+#endif
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/Android.mk
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/Android.mk
@ -0,0 +1,20 @@
+DLKM_DIR := motorola/kernel/modules
+LOCAL_PATH := $(call my-dir)
+
+ifeq ($(DLKM_INSTALL_TO_VENDOR_OUT),true)
+HIMAX_MMI_IC_MODULE_PATH := $(TARGET_OUT_VENDOR)/lib/modules/
+else
+HIMAX_MMI_IC_MODULE_PATH := $(KERNEL_MODULES_OUT)
+endif
+
+ifneq ($(filter hx83102d,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME_D)),)
+KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME_D=hx83102d
+endif
+
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := himax_0flash_mmi_hx83102d.ko
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_PATH := $(HIMAX_MMI_IC_MODULE_PATH)
+LOCAL_REQUIRED_MODULES := himax_0flash_mmi.ko
+include $(DLKM_DIR)/AndroidKernelModule.mk
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/Kbuild
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/Kbuild
@ -0,0 +1,20 @@
+# add -Wall to try to catch everything we can.
+EXTRA_CFLAGS += -Wall
+EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG \
+		-DCONFIG_TOUCHSCREEN_HIMAX_INSPECT
+
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_INCELL
+EXTRA_CFLAGS += -DCONFIG_HMX_DB
+
+ifneq ($(filter hx83102d,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME_D)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83102D_MOD__
+	EXTRA_CFLAGS += -DHX_ZERO_FLASH
+	EXTRA_CFLAGS += -DHX_CODE_OVERLAY
+endif
+
+obj-m := himax_0flash_mmi_hx83102d.o
+himax_0flash_mmi_hx83102d-objs += himax_ic_HX83102d.o
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/Makefile
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/Makefile
@ -0,0 +1,10 @@
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+
+all:
+	$(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS)
+
+modules_install:
+	$(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/himax_ic_HX83102d.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/himax_ic_HX83102d.c
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/himax_ic_HX83102d.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83102d/himax_ic_HX83102d.h
@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for HX83102 chipset
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include "himax_ic_core.h"
+#include <linux/slab.h>
+
+#define hx83102ab_fw_addr_sorting_mode_en		0x100007FC
+#define hx83102ab_fw_addr_selftest_addr_en		0x100007F8
+#define hx83102ab_data_adc_cfg_1			0x10007B00
+#define hx83102a_data_df_rx		48
+#define hx83102a_data_df_tx		24
+#define hx83102a_data_df_x_res		2160
+#define hx83102a_data_df_y_res		3840
+#define hx83102b_data_df_x_res		720
+#define hx83102b_data_df_y_res		1280
+
+#define hx83102d_fw_addr_raw_out_sel			0x800204f4
+#define hx83102d_zf_data_adc_cfg_1 0x10007B00
+#define hx83102d_zf_data_adc_cfg_2 0x10006A00
+#define hx83102d_zf_data_adc_cfg_3 0x10007500
+#define hx83102d_zf_data_bor_prevent_info 0x10007268
+#define hx83102d_zf_data_notch_info 0x10007300
+#define hx83102d_zf_func_info_en 0x10007FD0
+#define hx83102d_zf_po_sub_func 0x10005A00
+#define hx83102d_zf_data_sram_start_addr 0x20000000
+#define hx83102d_data_df_x_res		720
+#define hx83102d_data_df_y_res		1280
+#define hx83102d_adr_osc_en 0x9000009C
+#define hx83102d_adr_osc_pw 0x90000280
+
+#define hx83102e_fw_addr_raw_out_sel			0x100072EC
+#define hx83102e_data_df_rx		48
+#define hx83102e_data_df_tx		30
+#define hx83102e_data_df_x_res		1200
+#define hx83102e_data_df_y_res		1920
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#ifdef HX_EN_DYNAMIC_NAME
+#define hx83102_ic_b9_en        0x300B9000
+#define hx83102_ic_fw           0x300E8006
+
+#define hx83102b_ic_osc_en       0x900880A0
+#define hx83102d_ic_osc_en       0x9000009C
+#define hx83102d_ic_osc_pw       0x90000280
+#endif
+#endif
+
+#ifdef HX_ESD_RECOVERY
+	extern u8 HX_ESD_RESET_ACTIVATE;
+#endif
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/Android.mk
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/Android.mk
@ -0,0 +1,21 @@
+DLKM_DIR := motorola/kernel/modules
+LOCAL_PATH := $(call my-dir)
+
+ifeq ($(DLKM_INSTALL_TO_VENDOR_OUT),true)
+HIMAX_MMI_IC_MODULE_PATH := $(TARGET_OUT_VENDOR)/lib/modules/
+else
+HIMAX_MMI_IC_MODULE_PATH := $(KERNEL_MODULES_OUT)
+endif
+
+KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME=hx83112
+
+ifneq ($(BOARD_USES_TOUCH_PALM),)
+	KERNEL_CFLAGS += CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_ENABLE_PALM=y
+endif
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := himax_0flash_mmi_hx83112.ko
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_PATH := $(HIMAX_MMI_IC_MODULE_PATH)
+LOCAL_REQUIRED_MODULES := himax_0flash_mmi.ko
+include $(DLKM_DIR)/AndroidKernelModule.mk
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/Kbuild
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/Kbuild
@ -0,0 +1,22 @@
+# add -Wall to try to catch everything we can.
+EXTRA_CFLAGS += -Wall
+EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG \
+		-DCONFIG_TOUCHSCREEN_HIMAX_INSPECT
+
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_INCELL
+EXTRA_CFLAGS += -DCONFIG_HMX_DB
+
+ifneq ($(filter hx83112,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83112_MOD__
+endif
+
+ifneq ($(filter m y,$(CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_ENABLE_PALM)),)
+	EXTRA_CFLAGS += -DHIMAX_PALM_SENSOR_EN
+endif
+
+obj-m := himax_0flash_mmi_hx83112.o
+himax_0flash_mmi_hx83112-objs += himax_ic_HX83112.o
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/Makefile
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/Makefile
@ -0,0 +1,10 @@
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+
+all:
+	$(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS)
+
+modules_install:
+	$(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/himax_ic_HX83112.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/himax_ic_HX83112.c
@ -0,0 +1,427 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for HX83112 chipset
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_ic_HX83112.h"
+#include "himax_modular.h"
+
+static void hx83112_chip_init(void)
+{
+	(*kp_private_ts)->chip_cell_type = CHIP_IS_IN_CELL;
+	I("%s:IC cell type = %d\n",  __func__,  (*kp_private_ts)->chip_cell_type);
+	(*kp_IC_CHECKSUM)			= HX_TP_BIN_CHECKSUM_CRC;
+	/*Himax: Set FW and CFG Flash Address*/
+	(*kp_FW_VER_MAJ_FLASH_ADDR)   = 49157;  /*0x00C005*/
+	(*kp_FW_VER_MAJ_FLASH_LENG)   = 1;
+	(*kp_FW_VER_MIN_FLASH_ADDR)   = 49158;  /*0x00C006*/
+	(*kp_FW_VER_MIN_FLASH_LENG)   = 1;
+	(*kp_CFG_VER_MAJ_FLASH_ADDR)	= 49408;  /*0x00C100*/
+	(*kp_CFG_VER_MAJ_FLASH_LENG)	= 1;
+	(*kp_CFG_VER_MIN_FLASH_ADDR)	= 49409;  /*0x00C101*/
+	(*kp_CFG_VER_MIN_FLASH_LENG)	= 1;
+	(*kp_CID_VER_MAJ_FLASH_ADDR)	= 49154;  /*0x00C002*/
+	(*kp_CID_VER_MAJ_FLASH_LENG)	= 1;
+	(*kp_CID_VER_MIN_FLASH_ADDR)	= 49155;  /*0x00C003*/
+	(*kp_CID_VER_MIN_FLASH_LENG)	= 1;
+}
+
+static bool hx83112_sense_off(bool check_en)
+{
+	uint8_t cnt = 0;
+	uint8_t tmp_data[DATA_LEN_4];
+
+	do {
+		if (cnt == 0 || (tmp_data[0] != 0xA5 && tmp_data[0] != 0x00 && tmp_data[0] != 0x87))
+			kp_g_core_fp->fp_register_write((*kp_pfw_op)->addr_ctrl_fw_isr, DATA_LEN_4, (*kp_pfw_op)->data_fw_stop, 0);
+
+		/*msleep(20);*/
+		usleep_range(10000, 10001);
+		/* check fw status */
+		kp_g_core_fp->fp_register_read((*kp_pic_op)->addr_cs_central_state, ADDR_LEN_4, tmp_data, 0);
+
+		if (tmp_data[0] != 0x05) {
+			I("%s: Do not need wait FW, Status = 0x%02X!\n", __func__, tmp_data[0]);
+			break;
+		}
+
+		kp_g_core_fp->fp_register_read((*kp_pfw_op)->addr_ctrl_fw_isr, 4, tmp_data, false);
+		I("%s: cnt = %d, data[0] = 0x%02X!\n", __func__, cnt, tmp_data[0]);
+	} while (tmp_data[0] != 0x87 && (++cnt < 10) && check_en == true);
+
+	cnt = 0;
+
+	do {
+		/* ===========================================
+		 * I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x27
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_lb[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[15:8] set Enter safe mode :0x32 ==> 0x95
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_ub[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_ub[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x00
+		 * ===========================================
+		 */
+		tmp_data[0] = 0x00;
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x27
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_lb[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[15:8] set Enter safe mode :0x32 ==> 0x95
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_ub[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_ub[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ======================
+		 * Check enter_save_mode
+		 * ======================
+		 */
+		kp_g_core_fp->fp_register_read((*kp_pic_op)->addr_cs_central_state, ADDR_LEN_4, tmp_data, 0);
+		I("%s: Check enter_save_mode data[0]=%X\n", __func__, tmp_data[0]);
+
+		if (tmp_data[0] == 0x0C) {
+			/* =====================================
+			 * Reset TCON
+			 * =====================================
+			 */
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_tcon_on_rst, DATA_LEN_4, (*kp_pic_op)->data_rst, 0);
+			usleep_range(1000, 1001);
+			tmp_data[3] = (*kp_pic_op)->data_rst[3];
+			tmp_data[2] = (*kp_pic_op)->data_rst[2];
+			tmp_data[1] = (*kp_pic_op)->data_rst[1];
+			tmp_data[0] = (*kp_pic_op)->data_rst[0] | 0x01;
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_tcon_on_rst, DATA_LEN_4, tmp_data, 0);
+			/* =====================================
+			 * Reset ADC
+			 * =====================================
+			 */
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_adc_on_rst, DATA_LEN_4, (*kp_pic_op)->data_rst, 0);
+			usleep_range(1000, 1001);
+			tmp_data[3] = (*kp_pic_op)->data_rst[3];
+			tmp_data[2] = (*kp_pic_op)->data_rst[2];
+			tmp_data[1] = (*kp_pic_op)->data_rst[1];
+			tmp_data[0] = (*kp_pic_op)->data_rst[0] | 0x01;
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_adc_on_rst, DATA_LEN_4, tmp_data, 0);
+			goto SUCCEED;
+		} else {
+			/*msleep(10);*/
+#ifdef HX_RST_PIN_FUNC
+			kp_g_core_fp->fp_ic_reset(false, false);
+#else
+			kp_g_core_fp->fp_system_reset();
+#endif
+		}
+	} while (cnt++ < 5);
+
+	return false;
+SUCCEED:
+	return true;
+}
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#if defined(HX_EN_DYNAMIC_NAME)
+static void hx83112a_read_ic_ver(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t tmp_addr[DATA_LEN_4];
+
+	/* Enable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0x01;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_pw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0xA5;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x83;
+	tmp_data[2] = 0x11;
+	tmp_data[3] = 0x2A;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_b9_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x55;
+	tmp_data[2] = 0xAA;
+	tmp_data[3] = 0x00;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_eb_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	/* Read DD data */
+	kp_himax_in_parse_assign_cmd(hx83112_cb_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("CB=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_old_ic_ver = tmp_data[0];
+
+	kp_himax_in_parse_assign_cmd(hx83112_e8_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("E8=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_ic_ver = tmp_data[0];
+
+	/* Disable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0x00;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+}
+
+static void hx83112b_read_ic_ver(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t tmp_addr[DATA_LEN_4];
+
+	/* Enable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_pw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0xA5;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x83;
+	tmp_data[2] = 0x11;
+	tmp_data[3] = 0x2B;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_b9_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	/* Read DD data */
+	kp_himax_in_parse_assign_cmd(hx83112_cb_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("CB=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_old_ic_ver = tmp_data[0];
+
+	kp_himax_in_parse_assign_cmd(hx83112_e8_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("E8=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_ic_ver = tmp_data[0];
+}
+
+static void hx83112e_read_ic_ver(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t tmp_addr[DATA_LEN_4];
+
+	/* Enable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_pw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0xA5;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x83;
+	tmp_data[2] = 0x11;
+	tmp_data[3] = 0x2E;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_b9_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	/* Read DD data */
+	kp_himax_in_parse_assign_cmd(hx83112_cb_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("CB=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_old_ic_ver = tmp_data[0];
+
+	kp_himax_in_parse_assign_cmd(hx83112_e8_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("E8=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_ic_ver = tmp_data[0];
+}
+
+static void hx83112_dynamic_fw_name(uint8_t ic_name)
+{
+	char firmware_name[64];
+
+	if (ic_name == 0x2a)
+		hx83112a_read_ic_ver();
+	else if (ic_name == 0x2b)
+		hx83112b_read_ic_ver();
+	else
+		hx83112e_read_ic_ver();
+
+	if ((*kp_i_CTPM_firmware_name) != NULL) {
+		kfree((*kp_i_CTPM_firmware_name));
+		(*kp_i_CTPM_firmware_name) = NULL;
+	}
+	memset(firmware_name, 0x00, sizeof(firmware_name));
+
+	if (((*kp_ic_data)->vendor_ic_ver == 0x13) || ((*kp_ic_data)->vendor_ic_ver == 0x14) || ((*kp_ic_data)->vendor_ic_ver == 0x15)
+			|| ((*kp_ic_data)->vendor_ic_ver == 0x16) || ((*kp_ic_data)->vendor_ic_ver == 0x23)) {
+		(*kp_ic_data)->vendor_semifac = 2;
+	} else if (((*kp_ic_data)->vendor_old_ic_ver == 0x44) || ((*kp_ic_data)->vendor_old_ic_ver == 0x77)
+			|| ((*kp_ic_data)->vendor_ic_ver == 0x03) || ((*kp_ic_data)->vendor_ic_ver == 0x04)) {
+		(*kp_ic_data)->vendor_semifac = 1;
+	} else {
+		(*kp_ic_data)->vendor_semifac = 0;
+	}
+	memcpy(firmware_name, "Himax_firmware.bin", sizeof(char)*strlen("Himax_firmware.bin"));
+
+	(*kp_i_CTPM_firmware_name) = kzalloc((sizeof(char)*(strlen(firmware_name)+1)), GFP_KERNEL);
+	if ((*kp_i_CTPM_firmware_name) != NULL)
+		memcpy((*kp_i_CTPM_firmware_name), firmware_name, (sizeof(char)*(strlen(firmware_name)+1)));
+
+	I("(*kp_i_CTPM_firmware_name) : %s\n", (*kp_i_CTPM_firmware_name));
+}
+#endif
+#endif
+
+static void hx83112_func_re_init(void)
+{
+	kp_g_core_fp->fp_sense_off = hx83112_sense_off;
+	kp_g_core_fp->fp_chip_init = hx83112_chip_init;
+}
+
+static void hx83112_reg_re_init(void)
+{
+}
+
+static bool hx83112_chip_detect(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	bool ret_data = false;
+	int ret = 0;
+	int i = 0;
+
+	if (himax_ic_setup_external_symbols())
+		return false;
+
+	ret = kp_himax_mcu_in_cmd_struct_init();
+	if (ret < 0) {
+		ret_data = false;
+		E("%s:cmd_struct_init Fail:\n", __func__);
+		return ret_data;
+	}
+
+	kp_himax_mcu_in_cmd_init();
+
+	hx83112_reg_re_init();
+	hx83112_func_re_init();
+	if (kp_himax_bus_read((*kp_pic_op)->addr_conti[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+		E("%s: i2c access fail!\n", __func__);
+		return false;
+	}
+
+	if (kp_g_core_fp->fp_sense_off(false) == false) {
+		ret_data = false;
+		E("%s:fp_sense_off Fail:\n", __func__);
+		return ret_data;
+	}
+	for (i = 0; i < 5; i++) {
+		if (kp_g_core_fp->fp_register_read((*kp_pfw_op)->addr_icid_addr,  DATA_LEN_4,  tmp_data,  false) != 0) {
+			ret_data = false;
+			E("%s:fp_register_read Fail:\n", __func__);
+			return ret_data;
+		}
+		I("%s:Read driver IC ID = %X, %X, %X\n", __func__, tmp_data[3], tmp_data[2], tmp_data[1]);
+
+		if ((tmp_data[3] == 0x83) && (tmp_data[2] == 0x11) && ((tmp_data[1] == 0x2a) || (tmp_data[1] == 0x2b) || (tmp_data[1] == 0x2e))) {
+			if (tmp_data[1] == 0x2a)
+				strlcpy((*kp_private_ts)->chip_name,  HX_83112A_SERIES_PWON,  30);
+			else if (tmp_data[1] == 0x2b)
+				strlcpy((*kp_private_ts)->chip_name,  HX_83112B_SERIES_PWON,  30);
+
+			I("%s:IC name = %s\n", __func__, (*kp_private_ts)->chip_name);
+
+			I("Himax IC package %x%x%x in\n",  tmp_data[3],  tmp_data[2],  tmp_data[1]);
+			ret_data = true;
+			goto FINAL;
+		} else {
+			ret_data = false;
+			E("%s:Read driver ID register Fail:\n", __func__);
+			E("Could NOT find Himax Chipset\n");
+			E("Please check 1.VCCD,VCCA,VSP,VSN\n");
+			E("2. LCM_RST,TP_RST\n");
+			E("3. Power On Sequence\n");
+		}
+	}
+FINAL:
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#if defined(HX_EN_DYNAMIC_NAME)
+	hx83112_dynamic_fw_name(tmp_data[1]);
+#endif
+#endif
+
+	return ret_data;
+}
+
+DECLARE(HX_MOD_KSYM_HX83112);
+
+static int himax_hx83112_probe(void)
+{
+	I("%s:Enter\n", __func__);
+	himax_add_chip_dt(hx83112_chip_detect);
+	return 0;
+}
+
+static int himax_hx83112_remove(void)
+{
+	free_chip_dt_table();
+	return 0;
+}
+
+static int __init himax_hx83112_init(void)
+{
+	int ret = 0;
+
+	I("%s\n", __func__);
+	ret = himax_hx83112_probe();
+	return 0;
+}
+
+static void __exit himax_hx83112_exit(void)
+{
+	himax_hx83112_remove();
+}
+
+module_init(himax_hx83112_init);
+module_exit(himax_hx83112_exit);
+
+MODULE_DESCRIPTION("HIMAX HX83112 touch driver");
+MODULE_LICENSE("GPL");
+
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/himax_ic_HX83112.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112/himax_ic_HX83112.h
@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for HX83112 chipset
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include "himax_ic_core.h"
+#include <linux/slab.h>
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#ifdef HX_EN_DYNAMIC_NAME
+#define hx83112_ic_b9_en   0x300B9000
+#define hx83112_ic_eb_en   0x300EB000
+#define hx83112_ic_osc_en  0x900880A8
+#define hx83112_ic_osc_pw  0x900880E0
+#define hx83112_e8_ic_fw   0x300E8006
+#define hx83112_cb_ic_fw   0x300CB008
+#endif
+#endif
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/Android.mk
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/Android.mk
@ -0,0 +1,21 @@
+DLKM_DIR := motorola/kernel/modules
+LOCAL_PATH := $(call my-dir)
+
+ifeq ($(DLKM_INSTALL_TO_VENDOR_OUT),true)
+HIMAX_MMI_IC_MODULE_PATH := $(TARGET_OUT_VENDOR)/lib/modules/
+else
+HIMAX_MMI_IC_MODULE_PATH := $(KERNEL_MODULES_OUT)
+endif
+
+KERNEL_CFLAGS += CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME=hx83112f
+
+ifneq ($(BOARD_USES_TOUCH_PALM),)
+	KERNEL_CFLAGS += CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_ENABLE_PALM=y
+endif
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := himax_0flash_mmi_hx83112f.ko
+LOCAL_MODULE_TAGS := optional
+LOCAL_MODULE_PATH := $(HIMAX_MMI_IC_MODULE_PATH)
+LOCAL_REQUIRED_MODULES := himax_0flash_mmi.ko
+include $(DLKM_DIR)/AndroidKernelModule.mk
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/Kbuild
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/Kbuild
@ -0,0 +1,24 @@
+# add -Wall to try to catch everything we can.
+EXTRA_CFLAGS += -Wall
+EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic \
+		-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG \
+		-DCONFIG_TOUCHSCREEN_HIMAX_INSPECT
+
+EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_INCELL
+EXTRA_CFLAGS += -DCONFIG_HMX_DB
+
+ifneq ($(filter hx83112f,$(CONFIG_INPUT_HIMAX_V2_MMI_IC_NAME)),)
+	EXTRA_CFLAGS += -D__HIMAX_HX83112_MOD__
+	EXTRA_CFLAGS += -DHX_112F_SET
+	EXTRA_CFLAGS += -DHX_ZERO_FLASH
+endif
+
+ifneq ($(filter m y,$(CONFIG_INPUT_TOUCHSCREEN_HIMAX_V2_MMI_ENABLE_PALM)),)
+	EXTRA_CFLAGS += -DHIMAX_PALM_SENSOR_EN
+endif
+
+obj-m := himax_0flash_mmi_hx83112f.o
+himax_0flash_mmi_hx83112f-objs += himax_ic_HX83112f.o
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/Makefile
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/Makefile
@ -0,0 +1,10 @@
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+
+all:
+	$(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS)
+
+modules_install:
+	$(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/himax_ic_HX83112f.c
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/himax_ic_HX83112f.c
@ -0,0 +1,614 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for HX83112 chipset
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_ic_HX83112f.h"
+#include "himax_modular.h"
+
+#define HIMAX_XFER_RETRY_TIMES 			10
+
+static void hx83112_chip_init(void)
+{
+	(*kp_private_ts)->chip_cell_type = CHIP_IS_IN_CELL;
+	I("%s:IC cell type = %d\n",  __func__,  (*kp_private_ts)->chip_cell_type);
+	(*kp_IC_CHECKSUM)			= HX_TP_BIN_CHECKSUM_CRC;
+	/*Himax: Set FW and CFG Flash Address*/
+	(*kp_FW_VER_MAJ_FLASH_ADDR)   = 49157;  /*0x00C005*/
+	(*kp_FW_VER_MAJ_FLASH_LENG)   = 1;
+	(*kp_FW_VER_MIN_FLASH_ADDR)   = 49158;  /*0x00C006*/
+	(*kp_FW_VER_MIN_FLASH_LENG)   = 1;
+	(*kp_CFG_VER_MAJ_FLASH_ADDR)	= 49408;  /*0x00C100*/
+	(*kp_CFG_VER_MAJ_FLASH_LENG)	= 1;
+	(*kp_CFG_VER_MIN_FLASH_ADDR)	= 49409;  /*0x00C101*/
+	(*kp_CFG_VER_MIN_FLASH_LENG)	= 1;
+	(*kp_CID_VER_MAJ_FLASH_ADDR)	= 49154;  /*0x00C002*/
+	(*kp_CID_VER_MAJ_FLASH_LENG)	= 1;
+	(*kp_CID_VER_MIN_FLASH_ADDR)	= 49155;  /*0x00C003*/
+	(*kp_CID_VER_MIN_FLASH_LENG)	= 1;
+}
+
+static bool hx83112_sense_off(bool check_en)
+{
+	uint8_t cnt = 0;
+	uint8_t tmp_data[DATA_LEN_4];
+
+	do {
+		if (cnt == 0 || (tmp_data[0] != 0xA5 && tmp_data[0] != 0x00 && tmp_data[0] != 0x87))
+			kp_g_core_fp->fp_register_write((*kp_pfw_op)->addr_ctrl_fw_isr, DATA_LEN_4, (*kp_pfw_op)->data_fw_stop, 0);
+
+		/*msleep(20);*/
+		usleep_range(10000, 10001);
+		/* check fw status */
+		kp_g_core_fp->fp_register_read((*kp_pic_op)->addr_cs_central_state, ADDR_LEN_4, tmp_data, 0);
+
+		if (tmp_data[0] != 0x05) {
+			I("%s: Do not need wait FW, Status = 0x%02X!\n", __func__, tmp_data[0]);
+			break;
+		}
+
+		kp_g_core_fp->fp_register_read((*kp_pfw_op)->addr_ctrl_fw_isr, 4, tmp_data, false);
+		I("%s: cnt = %d, data[0] = 0x%02X!\n", __func__, cnt, tmp_data[0]);
+	} while (tmp_data[0] != 0x87 && (++cnt < 10) && check_en == true);
+
+	cnt = 0;
+
+	do {
+		/* ===========================================
+		 * I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x27
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_lb[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[15:8] set Enter safe mode :0x32 ==> 0x95
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_ub[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_ub[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x00
+		 * ===========================================
+		 */
+		tmp_data[0] = 0x00;
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x27
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_lb[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ===========================================
+		 * I2C_password[15:8] set Enter safe mode :0x32 ==> 0x95
+		 * ===========================================
+		 */
+		tmp_data[0] = (*kp_pic_op)->data_i2c_psw_ub[0];
+
+		if (kp_himax_bus_write((*kp_pic_op)->adr_i2c_psw_ub[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		/* ======================
+		 * Check enter_save_mode
+		 * ======================
+		 */
+		kp_g_core_fp->fp_register_read((*kp_pic_op)->addr_cs_central_state, ADDR_LEN_4, tmp_data, 0);
+		I("%s: Check enter_save_mode data[0]=%X\n", __func__, tmp_data[0]);
+
+		if (tmp_data[0] == 0x0C) {
+			/* =====================================
+			 * Reset TCON
+			 * =====================================
+			 */
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_tcon_on_rst, DATA_LEN_4, (*kp_pic_op)->data_rst, 0);
+			usleep_range(1000, 1001);
+			tmp_data[3] = (*kp_pic_op)->data_rst[3];
+			tmp_data[2] = (*kp_pic_op)->data_rst[2];
+			tmp_data[1] = (*kp_pic_op)->data_rst[1];
+			tmp_data[0] = (*kp_pic_op)->data_rst[0] | 0x01;
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_tcon_on_rst, DATA_LEN_4, tmp_data, 0);
+			/* =====================================
+			 * Reset ADC
+			 * =====================================
+			 */
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_adc_on_rst, DATA_LEN_4, (*kp_pic_op)->data_rst, 0);
+			usleep_range(1000, 1001);
+			tmp_data[3] = (*kp_pic_op)->data_rst[3];
+			tmp_data[2] = (*kp_pic_op)->data_rst[2];
+			tmp_data[1] = (*kp_pic_op)->data_rst[1];
+			tmp_data[0] = (*kp_pic_op)->data_rst[0] | 0x01;
+			kp_g_core_fp->fp_register_write((*kp_pic_op)->addr_adc_on_rst, DATA_LEN_4, tmp_data, 0);
+			goto SUCCEED;
+		} else {
+			/*msleep(10);*/
+#ifdef HX_RST_PIN_FUNC
+			kp_g_core_fp->fp_ic_reset(false, false);
+#else
+			kp_g_core_fp->fp_system_reset();
+#endif
+		}
+	} while (cnt++ < 5);
+
+	return false;
+SUCCEED:
+	return true;
+}
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#if defined(HX_EN_DYNAMIC_NAME)
+static void hx83112a_read_ic_ver(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t tmp_addr[DATA_LEN_4];
+
+	/* Enable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0x01;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_pw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0xA5;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x83;
+	tmp_data[2] = 0x11;
+	tmp_data[3] = 0x2A;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_b9_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x55;
+	tmp_data[2] = 0xAA;
+	tmp_data[3] = 0x00;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_eb_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	/* Read DD data */
+	kp_himax_in_parse_assign_cmd(hx83112_cb_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("CB=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_old_ic_ver = tmp_data[0];
+
+	kp_himax_in_parse_assign_cmd(hx83112_e8_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("E8=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_ic_ver = tmp_data[0];
+
+	/* Disable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0x00;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+}
+
+static void hx83112b_read_ic_ver(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t tmp_addr[DATA_LEN_4];
+
+	/* Enable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_pw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0xA5;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x83;
+	tmp_data[2] = 0x11;
+	tmp_data[3] = 0x2B;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_b9_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	/* Read DD data */
+	kp_himax_in_parse_assign_cmd(hx83112_cb_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("CB=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_old_ic_ver = tmp_data[0];
+
+	kp_himax_in_parse_assign_cmd(hx83112_e8_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("E8=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_ic_ver = tmp_data[0];
+}
+
+static void hx83112e_read_ic_ver(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t tmp_addr[DATA_LEN_4];
+
+	/* Enable read DD */
+	kp_himax_in_parse_assign_cmd(hx83112_ic_osc_pw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	tmp_data[0] = 0xA5;
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	tmp_data[0] = 0x00;
+	tmp_data[1] = 0x83;
+	tmp_data[2] = 0x11;
+	tmp_data[3] = 0x2E;
+	kp_himax_in_parse_assign_cmd(hx83112_ic_b9_en, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_write(tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	/* Read DD data */
+	kp_himax_in_parse_assign_cmd(hx83112_cb_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("CB=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_old_ic_ver = tmp_data[0];
+
+	kp_himax_in_parse_assign_cmd(hx83112_e8_ic_fw, tmp_addr, sizeof(tmp_addr));
+	kp_g_core_fp->fp_register_read(tmp_addr, DATA_LEN_4, tmp_data, 0);
+	I("E8=%X\n", tmp_data[0]);
+	(*kp_ic_data)->vendor_ic_ver = tmp_data[0];
+}
+
+static void hx83112_dynamic_fw_name(uint8_t ic_name)
+{
+	char firmware_name[64];
+
+	if (ic_name == 0x2a)
+		hx83112a_read_ic_ver();
+	else if (ic_name == 0x2b)
+		hx83112b_read_ic_ver();
+	else
+		hx83112e_read_ic_ver();
+
+	if ((*kp_i_CTPM_firmware_name) != NULL) {
+		kfree((*kp_i_CTPM_firmware_name));
+		(*kp_i_CTPM_firmware_name) = NULL;
+	}
+	memset(firmware_name, 0x00, sizeof(firmware_name));
+
+	if (((*kp_ic_data)->vendor_ic_ver == 0x13) || ((*kp_ic_data)->vendor_ic_ver == 0x14) || ((*kp_ic_data)->vendor_ic_ver == 0x15)
+			|| ((*kp_ic_data)->vendor_ic_ver == 0x16) || ((*kp_ic_data)->vendor_ic_ver == 0x23)) {
+		(*kp_ic_data)->vendor_semifac = 2;
+	} else if (((*kp_ic_data)->vendor_old_ic_ver == 0x44) || ((*kp_ic_data)->vendor_old_ic_ver == 0x77)
+			|| ((*kp_ic_data)->vendor_ic_ver == 0x03) || ((*kp_ic_data)->vendor_ic_ver == 0x04)) {
+		(*kp_ic_data)->vendor_semifac = 1;
+	} else {
+		(*kp_ic_data)->vendor_semifac = 0;
+	}
+	memcpy(firmware_name, "Himax_firmware.bin", sizeof(char)*strlen("Himax_firmware.bin"));
+
+	(*kp_i_CTPM_firmware_name) = kzalloc((sizeof(char)*(strlen(firmware_name)+1)), GFP_KERNEL);
+	if ((*kp_i_CTPM_firmware_name) != NULL)
+		memcpy((*kp_i_CTPM_firmware_name), firmware_name, (sizeof(char)*(strlen(firmware_name)+1)));
+
+	I("(*kp_i_CTPM_firmware_name) : %s\n", (*kp_i_CTPM_firmware_name));
+}
+#endif
+#endif
+
+static void hx83112_func_re_init(void)
+{
+	kp_g_core_fp->fp_sense_off = hx83112_sense_off;
+	kp_g_core_fp->fp_chip_init = hx83112_chip_init;
+}
+
+#ifdef HX_ESD_RECOVERY
+static void himax_hx83112f_esd_dd_ic_reset(void)
+{
+	uint8_t addr[4] = {0};
+   uint8_t data[4] = {0};
+
+	I("%s: Entering\n", __func__);
+	kp_himax_in_parse_assign_cmd(0x9000001C, addr, sizeof(addr));
+   kp_himax_in_parse_assign_cmd(0x49, data, sizeof(data));
+   kp_g_core_fp->fp_register_write(addr, 4, data, 0);
+   usleep_range(49000, 49000);
+}
+#endif
+
+static void himax_hx83112f_reload_to_active(void)
+{
+	uint8_t addr[DATA_LEN_4] = {0};
+	uint8_t data[DATA_LEN_4] = {0};
+	uint8_t retry_cnt = 0;
+
+	addr[3] = 0x90;
+	addr[2] = 0x00;
+	addr[1] = 0x00;
+	addr[0] = 0x48;
+
+	do {
+		data[3] = 0x00;
+		data[2] = 0x00;
+		data[1] = 0x00;
+		data[0] = 0xEC;
+		kp_g_core_fp->fp_register_write(addr, DATA_LEN_4, data, 0);
+		usleep_range(1000, 1100);
+		kp_g_core_fp->fp_register_read(addr, DATA_LEN_4, data, 0);
+		I("%s: data[1]=%d, data[0]=%d, retry_cnt=%d\n", __func__,
+				data[1], data[0], retry_cnt);
+		retry_cnt++;
+	} while ((data[1] != 0x01
+		|| data[0] != 0xEC)
+		&& retry_cnt < HIMAX_REG_RETRY_TIMES);
+}
+
+static void himax_hx83112f_resume_ic_action(void)
+{
+#if !defined(HX_RESUME_HW_RESET)
+	himax_hx83112f_reload_to_active();
+#endif
+}
+
+static void himax_hx83112f_suspend_ic_action(void)
+{
+#if !defined(HX_RESUME_HW_RESET)
+	himax_hx83112f_reload_to_active();
+#endif
+}
+
+static void himax_hx83112f_sense_on(uint8_t FlashMode)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	int retry = 0;
+	int ret = 0;
+
+	I("Enter %s\n", __func__);
+
+	kp_g_core_fp->fp_interface_on();
+	kp_g_core_fp->fp_register_write((*kp_pfw_op)->addr_ctrl_fw_isr,
+		sizeof((*kp_pfw_op)->data_clear), (*kp_pfw_op)->data_clear, 0);
+	/*msleep(20);*/
+	usleep_range(10000, 10001);
+	if (!FlashMode) {
+#if defined(HX_RST_PIN_FUNC)
+		kp_g_core_fp->fp_ic_reset(false, false);
+#else
+		kp_g_core_fp->fp_system_reset();
+#endif
+		himax_hx83112f_reload_to_active();
+	} else {
+		himax_hx83112f_reload_to_active();
+		do {
+			kp_g_core_fp->fp_register_write(
+				(*kp_pfw_op)->addr_safe_mode_release_pw,
+				sizeof((*kp_pfw_op)->data_safe_mode_release_pw_active),
+				(*kp_pfw_op)->data_safe_mode_release_pw_active,
+				0);
+
+			kp_g_core_fp->fp_register_read(
+				(*kp_pfw_op)->addr_flag_reset_event,
+				DATA_LEN_4, tmp_data, 0);
+			I("%s:Read status from IC = %X,%X\n", __func__,
+					tmp_data[0], tmp_data[1]);
+		} while ((tmp_data[1] != 0x01
+			|| tmp_data[0] != 0x00)
+			&& retry++ < 5);
+
+		if (retry >= 5) {
+			E("%s: Fail:\n", __func__);
+#if defined(HX_RST_PIN_FUNC)
+			kp_g_core_fp->fp_ic_reset(false, false);
+#else
+			kp_g_core_fp->fp_system_reset();
+#endif
+			himax_hx83112f_reload_to_active();
+		} else {
+			I("%s:OK and Read status from IC = %X,%X\n", __func__,
+				tmp_data[0], tmp_data[1]);
+			/* reset code*/
+			tmp_data[0] = 0x00;
+
+			ret = kp_himax_bus_write(
+				(*kp_pic_op)->data_i2c_psw_lb[0],
+				tmp_data, 1, HIMAX_XFER_RETRY_TIMES);
+			if (ret < 0)
+				E("%s: i2c access fail!\n", __func__);
+
+				ret = kp_himax_bus_write(
+					(*kp_pic_op)->data_i2c_psw_ub[0],
+					tmp_data, 1, HIMAX_XFER_RETRY_TIMES);
+			if (ret < 0)
+				E("%s: i2c access fail!\n", __func__);
+
+			kp_g_core_fp->fp_register_write(
+				(*kp_pfw_op)->addr_safe_mode_release_pw,
+				sizeof((*kp_pfw_op)->data_safe_mode_release_pw_reset),
+				(*kp_pfw_op)->data_safe_mode_release_pw_reset,
+				0);
+		}
+	}
+}
+
+/* File node for SMWP and HSEN - End*/
+void himax_parse_assign_cmd(uint32_t addr, uint8_t *cmd, int len)
+{
+	/*I("%s: Entering!\n", __func__);*/
+
+	switch (len) {
+	case 1:
+		cmd[0] = addr;
+		/*I("%s: cmd[0] = 0x%02X\n", __func__, cmd[0]);*/
+		break;
+
+	case 2:
+		cmd[0] = addr % 0x100;
+		cmd[1] = (addr >> 8) % 0x100;
+		/*I("%s: cmd[0] = 0x%02X,cmd[1] = 0x%02X\n",*/
+		/*	__func__, cmd[0], cmd[1]);*/
+		break;
+
+	case 4:
+		cmd[0] = addr % 0x100;
+		cmd[1] = (addr >> 8) % 0x100;
+		cmd[2] = (addr >> 16) % 0x100;
+		cmd[3] = addr / 0x1000000;
+		/*  I("%s: cmd[0] = 0x%02X,cmd[1] = 0x%02X,*/
+		/*cmd[2] = 0x%02X,cmd[3] = 0x%02X\n", */
+		/* __func__, cmd[0], cmd[1], cmd[2], cmd[3]);*/
+		break;
+
+	default:
+		E("%s: input length fault,len = %d!\n", __func__, len);
+	}
+}
+
+static void hx83112f_reg_re_init(void)
+{
+	himax_parse_assign_cmd(hx83112f_fw_addr_raw_out_sel,
+		(*kp_pfw_op)->addr_raw_out_sel,
+		sizeof((*kp_pfw_op)->addr_raw_out_sel));
+}
+
+static void hx83112f_func_re_init(void)
+{
+	kp_g_core_fp->fp_resume_ic_action = himax_hx83112f_resume_ic_action;
+	kp_g_core_fp->fp_suspend_ic_action = himax_hx83112f_suspend_ic_action;
+	kp_g_core_fp->fp_sense_on = himax_hx83112f_sense_on;
+	kp_g_core_fp->fp_0f_reload_to_active = himax_hx83112f_reload_to_active;
+#ifdef HX_ESD_RECOVERY
+	kp_g_core_fp->_esd_ic_dd_reset = himax_hx83112f_esd_dd_ic_reset;
+#endif
+}
+
+static void hx83112_reg_re_init(void)
+{
+}
+
+static bool hx83112_chip_detect(void)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	bool ret_data = false;
+	int ret = 0;
+	int i = 0;
+
+	if (himax_ic_setup_external_symbols())
+		return false;
+
+	ret = kp_himax_mcu_in_cmd_struct_init();
+	if (ret < 0) {
+		ret_data = false;
+		E("%s:cmd_struct_init Fail:\n", __func__);
+		return ret_data;
+	}
+
+	kp_himax_mcu_in_cmd_init();
+
+	hx83112_reg_re_init();
+	hx83112_func_re_init();
+	if (kp_himax_bus_read((*kp_pic_op)->addr_conti[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
+		E("%s: i2c access fail!\n", __func__);
+		return false;
+	}
+
+	if (kp_g_core_fp->fp_sense_off(false) == false) {
+		ret_data = false;
+		E("%s:fp_sense_off Fail:\n", __func__);
+		return ret_data;
+	}
+	for (i = 0; i < 5; i++) {
+		if (kp_g_core_fp->fp_register_read((*kp_pfw_op)->addr_icid_addr,  DATA_LEN_4,  tmp_data,  false) != 0) {
+			ret_data = false;
+			E("%s:fp_register_read Fail:\n", __func__);
+			return ret_data;
+		}
+		I("%s:Read driver IC ID = %X, %X, %X\n", __func__, tmp_data[3], tmp_data[2], tmp_data[1]);
+
+		if ((tmp_data[3] == 0x83) && (tmp_data[2] == 0x11) && ((tmp_data[1] == 0x2a) || (tmp_data[1] == 0x2b) || (tmp_data[1] == 0x2e) || (tmp_data[1] == 0x2f))) {
+			if (tmp_data[1] == 0x2a)
+				strlcpy((*kp_private_ts)->chip_name,  HX_83112A_SERIES_PWON,  30);
+			else if (tmp_data[1] == 0x2b)
+				strlcpy((*kp_private_ts)->chip_name,  HX_83112B_SERIES_PWON,  30);
+			else if (tmp_data[1] == 0x2f) {
+				strlcpy ((*kp_private_ts)->chip_name,  HX_83112F_SERIES_PWON,  30);
+				hx83112f_reg_re_init();
+				hx83112f_func_re_init();
+			}
+				
+
+			I("%s:IC name = %s\n", __func__, (*kp_private_ts)->chip_name);
+
+			I("Himax IC package %x%x%x in\n",  tmp_data[3],  tmp_data[2],  tmp_data[1]);
+			ret_data = true;
+			goto FINAL;
+		} else {
+			ret_data = false;
+			E("%s:Read driver ID register Fail:\n", __func__);
+			E("Could NOT find Himax Chipset\n");
+			E("Please check 1.VCCD,VCCA,VSP,VSN\n");
+			E("2. LCM_RST,TP_RST\n");
+			E("3. Power On Sequence\n");
+		}
+	}
+FINAL:
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#if defined(HX_EN_DYNAMIC_NAME)
+	hx83112_dynamic_fw_name(tmp_data[1]);
+#endif
+#endif
+
+	return ret_data;
+}
+
+DECLARE(HX_MOD_KSYM_HX83112);
+
+static int himax_hx83112_probe(void)
+{
+	I("%s:Enter\n", __func__);
+	himax_add_chip_dt(hx83112_chip_detect);
+	return 0;
+}
+
+static int himax_hx83112_remove(void)
+{
+	free_chip_dt_table();
+	return 0;
+}
+
+static int __init himax_hx83112_init(void)
+{
+	int ret = 0;
+
+	I("%s\n", __func__);
+	ret = himax_hx83112_probe();
+	return 0;
+}
+
+static void __exit himax_hx83112_exit(void)
+{
+	himax_hx83112_remove();
+}
+
+module_init(himax_hx83112_init);
+module_exit(himax_hx83112_exit);
+
+MODULE_DESCRIPTION("HIMAX HX83112 touch driver");
+MODULE_LICENSE("GPL");
+
+
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/himax_ic_HX83112f.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_0flash_mmi_hx83112f/himax_ic_HX83112f.h
@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for HX83112 chipset
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include "himax_ic_core.h"
+#include <linux/slab.h>
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#ifdef HX_EN_DYNAMIC_NAME
+#define hx83112_ic_b9_en   0x300B9000
+#define hx83112_ic_eb_en   0x300EB000
+#define hx83112_ic_osc_en  0x900880A8
+#define hx83112_ic_osc_pw  0x900880E0
+#define hx83112_e8_ic_fw   0x300E8006
+#define hx83112_cb_ic_fw   0x300CB008
+#endif
+#endif
+#define hx83112f_fw_addr_raw_out_sel     0x100072ec
--- a/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_modular.h
+++ b/drivers/input/touchscreen/himax_0flash_mmi/support_ic/himax_modular.h
@ -0,0 +1,275 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*  Himax Android Driver Sample Code for modularize functions
+ *
+ *  Copyright (C) 2019 Himax Corporation.
+ *
+ *  This software is licensed under the terms of the GNU General Public
+ *  License version 2,  as published by the Free Software Foundation,  and
+ *  may be copied,  distributed,  and modified under those terms.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef __HIMAX_MODULAR_H__
+#define __HIMAX_MODULAR_H__
+
+#include "himax_modular_table.h"
+
+static bool (*this_detect_fp)(void);
+
+static void himax_add_chip_dt(bool (*detect_fp)(void))
+{
+	int32_t idx;
+	struct himax_chip_entry *entry;
+
+	this_detect_fp = detect_fp;
+	idx = himax_get_ksym_idx();
+	if (idx < 0) {
+		/*TODO: No entry, handle this error*/
+		E("%s: no entry exist, please insert ic module first!", __func__);
+	} else {
+		entry = (void *)kallsyms_lookup_name(himax_ksym_lookup[idx]);
+		if (/*!(entry->core_chip_dt)*/isEmpty(idx) == 1) {
+			entry->core_chip_dt = kcalloc(HX_DRIVER_MAX_IC_NUM,
+				sizeof(struct himax_chip_detect), GFP_KERNEL);
+			entry->hx_ic_dt_num = 0;
+		}
+		entry->core_chip_dt[entry->hx_ic_dt_num++].fp_chip_detect = detect_fp;
+	}
+}
+
+static void free_chip_dt_table(void)
+{
+	int i, j, idx;
+	struct himax_chip_entry *entry;
+
+	idx = himax_get_ksym_idx();
+	if (idx >= 0) {
+		if (isEmpty(idx) != 0) {
+			I("%s: no chip registered or entry has been clean up, leave safetly.\n",
+				__func__);
+			return;
+		}
+		entry = get_chip_entry_by_index(idx);
+
+		for (i = 0; i < entry->hx_ic_dt_num; i++) {
+			if (entry->core_chip_dt[i].fp_chip_detect == this_detect_fp) {
+				if (i == (entry->hx_ic_dt_num - 1)) {
+					entry->core_chip_dt[i].fp_chip_detect = NULL;
+					entry->hx_ic_dt_num = 0;
+				} else {
+					for (j = i; j < entry->hx_ic_dt_num; j++)
+						entry->core_chip_dt[i].fp_chip_detect = entry->core_chip_dt[j].fp_chip_detect;
+
+					entry->core_chip_dt[j].fp_chip_detect = NULL;
+					entry->hx_ic_dt_num--;
+				}
+			}
+		}
+		if (entry->hx_ic_dt_num == 0) {
+			kfree(entry->core_chip_dt);
+			entry->core_chip_dt = NULL;
+		}
+	}
+}
+
+#define setup_symbol(sym)	({kp_##sym = (void *)kallsyms_lookup_name(#sym); kp_##sym; })
+#define assert_on_symbol(sym)	do { \
+					if (!setup_symbol(sym)) { \
+						E("%s: setup %s failed!\n", __func__, #sym); \
+						ret = -1; \
+					} \
+				} while (0)
+#if !defined(__HIMAX_HX852xH_MOD__) && !defined(__HIMAX_HX852xG_MOD__)
+static struct fw_operation **kp_pfw_op;
+static struct ic_operation **kp_pic_op;
+static struct driver_operation **kp_pdriver_op;
+#endif
+static struct himax_chip_detect **kp_g_core_chip_dt;
+
+#if defined(HX_ZERO_FLASH)
+static struct zf_operation **kp_pzf_op;
+static int *kp_G_POWERONOF;
+#endif
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#if defined(HX_EN_DYNAMIC_NAME)
+	static char **kp_i_CTPM_firmware_name;
+#endif
+#endif
+
+static unsigned char *kp_IC_CHECKSUM;
+
+#ifdef HX_ESD_RECOVERY
+static u8 *kp_HX_ESD_RESET_ACTIVATE;
+#endif
+
+#if defined(HX_ZERO_FLASH) && defined(HX_CODE_OVERLAY)
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_INCELL)
+extern uint8_t *ovl_idx;
+static uint8_t **kp_ovl_idx;
+#endif
+#endif
+
+static unsigned long *kp_FW_VER_MAJ_FLASH_ADDR;
+static unsigned long *kp_FW_VER_MIN_FLASH_ADDR;
+static unsigned long *kp_CFG_VER_MAJ_FLASH_ADDR;
+static unsigned long *kp_CFG_VER_MIN_FLASH_ADDR;
+static unsigned long *kp_CID_VER_MAJ_FLASH_ADDR;
+static unsigned long *kp_CID_VER_MIN_FLASH_ADDR;
+
+static unsigned long *kp_FW_VER_MAJ_FLASH_LENG;
+static unsigned long *kp_FW_VER_MIN_FLASH_LENG;
+static unsigned long *kp_CFG_VER_MAJ_FLASH_LENG;
+static unsigned long *kp_CFG_VER_MIN_FLASH_LENG;
+static unsigned long *kp_CID_VER_MAJ_FLASH_LENG;
+static unsigned long *kp_CID_VER_MIN_FLASH_LENG;
+
+#ifdef HX_AUTO_UPDATE_FW
+	static int *kp_g_i_FW_VER;
+	static int *kp_g_i_CFG_VER;
+	static int *kp_g_i_CID_MAJ;
+	static int *kp_g_i_CID_MIN;
+	static unsigned char **kp_i_CTPM_FW;
+#endif
+
+#ifdef HX_TP_PROC_2T2R
+	static bool *kp_Is_2T2R;
+#endif
+
+#ifdef HX_USB_DETECT_GLOBAL
+	static void (*kp_himax_cable_detect_func)(bool force_renew);
+#endif
+
+#ifdef HX_RST_PIN_FUNC
+	static void (*kp_himax_rst_gpio_set)(int pinnum, uint8_t value);
+#endif
+
+static struct himax_ts_data **kp_private_ts;
+static struct himax_core_fp *kp_g_core_fp;
+static struct himax_ic_data **kp_ic_data;
+
+#if defined(__HIMAX_HX852xH_MOD__) || defined(__HIMAX_HX852xG_MOD__)
+#if defined(__HIMAX_HX852xG_MOD__)
+static struct on_driver_operation **kp_on_pdriver_op;
+#endif
+static void (*kp_himax_mcu_on_cmd_init)(void);
+static int (*kp_himax_mcu_on_cmd_struct_init)(void);
+static void (*kp_himax_on_parse_assign_cmd)(uint32_t addr, uint8_t *cmd, int len);
+#else
+static void (*kp_himax_mcu_in_cmd_init)(void);
+static int (*kp_himax_mcu_in_cmd_struct_init)(void);
+static void (*kp_himax_in_parse_assign_cmd)(uint32_t addr, uint8_t *cmd, int len);
+#endif
+
+static int *kp_irq_enable_count;
+static int (*kp_himax_bus_read)(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
+static int (*kp_himax_bus_write)(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
+static int (*kp_himax_bus_write_command)(uint8_t command, uint8_t toRetry);
+static int (*kp_himax_bus_master_write)(uint8_t *data, uint32_t length, uint8_t toRetry);
+static void (*kp_himax_int_enable)(int enable);
+static int (*kp_himax_ts_register_interrupt)(void);
+static uint8_t (*kp_himax_int_gpio_read)(int pinnum);
+static int (*kp_himax_gpio_power_config)(struct himax_i2c_platform_data *pdata);
+
+static int32_t himax_ic_setup_external_symbols(void)
+{
+	int32_t ret = 0;
+
+#if !defined(__HIMAX_HX852xH_MOD__) && !defined(__HIMAX_HX852xG_MOD__)
+	assert_on_symbol(pfw_op);
+	assert_on_symbol(pic_op);
+	assert_on_symbol(pdriver_op);
+#endif
+	assert_on_symbol(g_core_chip_dt);
+
+	assert_on_symbol(private_ts);
+	assert_on_symbol(g_core_fp);
+	assert_on_symbol(ic_data);
+
+#if defined(__HIMAX_HX852xH_MOD__) || defined(__HIMAX_HX852xG_MOD__)
+#if defined(__HIMAX_HX852xG_MOD__)
+	assert_on_symbol(on_pdriver_op);
+#endif
+	assert_on_symbol(himax_mcu_on_cmd_init);
+	assert_on_symbol(himax_mcu_on_cmd_struct_init);
+	assert_on_symbol(himax_on_parse_assign_cmd);
+#else
+	assert_on_symbol(himax_mcu_in_cmd_init);
+	assert_on_symbol(himax_mcu_in_cmd_struct_init);
+	assert_on_symbol(himax_in_parse_assign_cmd);
+#endif
+
+	assert_on_symbol(irq_enable_count);
+	assert_on_symbol(himax_bus_read);
+	assert_on_symbol(himax_bus_write);
+	assert_on_symbol(himax_bus_write_command);
+	assert_on_symbol(himax_bus_master_write);
+	assert_on_symbol(himax_int_enable);
+	assert_on_symbol(himax_ts_register_interrupt);
+	assert_on_symbol(himax_int_gpio_read);
+	assert_on_symbol(himax_gpio_power_config);
+
+#if defined(HX_ZERO_FLASH)
+	assert_on_symbol(pzf_op);
+	assert_on_symbol(G_POWERONOF);
+#endif
+
+#if defined(HX_AUTO_UPDATE_FW) || defined(HX_ZERO_FLASH)
+#if defined(HX_EN_DYNAMIC_NAME)
+	assert_on_symbol(i_CTPM_firmware_name);
+#endif
+#endif
+	assert_on_symbol(IC_CHECKSUM);
+
+	assert_on_symbol(FW_VER_MAJ_FLASH_ADDR);
+	assert_on_symbol(FW_VER_MIN_FLASH_ADDR);
+	assert_on_symbol(CFG_VER_MAJ_FLASH_ADDR);
+	assert_on_symbol(CFG_VER_MIN_FLASH_ADDR);
+	assert_on_symbol(CID_VER_MAJ_FLASH_ADDR);
+	assert_on_symbol(CID_VER_MIN_FLASH_ADDR);
+
+	assert_on_symbol(FW_VER_MAJ_FLASH_LENG);
+	assert_on_symbol(FW_VER_MIN_FLASH_LENG);
+	assert_on_symbol(CFG_VER_MAJ_FLASH_LENG);
+	assert_on_symbol(CFG_VER_MIN_FLASH_LENG);
+	assert_on_symbol(CID_VER_MAJ_FLASH_LENG);
+	assert_on_symbol(CID_VER_MIN_FLASH_LENG);
+
+#ifdef HX_AUTO_UPDATE_FW
+	assert_on_symbol(g_i_FW_VER);
+	assert_on_symbol(g_i_CFG_VER);
+	assert_on_symbol(g_i_CID_MAJ);
+	assert_on_symbol(g_i_CID_MIN);
+	assert_on_symbol(i_CTPM_FW);
+#endif
+
+#ifdef HX_TP_PROC_2T2R
+	assert_on_symbol(Is_2T2R);
+#endif
+
+#ifdef HX_USB_DETECT_GLOBAL
+	assert_on_symbol(himax_cable_detect_func);
+#endif
+
+#ifdef HX_RST_PIN_FUNC
+	assert_on_symbol(himax_rst_gpio_set);
+#endif
+
+#ifdef HX_ESD_RECOVERY
+	assert_on_symbol(HX_ESD_RESET_ACTIVATE);
+#endif
+
+#if defined(HX_ZERO_FLASH) && defined(HX_CODE_OVERLAY)
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_INCELL)
+	assert_on_symbol(ovl_idx);
+#endif
+#endif
+	return ret;
+}
+
+
+#endif