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clk: qcom: gcc: Add support for edp ref clock for Yupik

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EDP clock is required for edp consumer.

Change-Id: I06a537f06dd95af67db2679f5d16620eef624a60
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
This commit is contained in:
Taniya Das 2023-01-27 09:03:25 +05:30 • committed by Gerrit - the friendly Code Review server
commit f73dcc175f
1 changed files with 14 additions and 0 deletions
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14
drivers/clk/qcom/gcc-yupik.c
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@ -2173,6 +2173,19 @@ static struct clk_branch gcc_pcie_clkref_en = {
},
};
static struct clk_branch gcc_edp_clkref_en = {
.halt_reg = 0x8c008,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x8c008,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_edp_clkref_en",
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_pcie_throttle_core_clk = {
.halt_reg = 0x90018,
.halt_check = BRANCH_HALT_SKIP,
@ -3510,6 +3523,7 @@ static struct clk_regmap *gcc_yupik_clocks[] = {
[GCC_VIDEO_AXI0_CLK] = &gcc_video_axi0_clk.clkr,
[GCC_VIDEO_MVP_THROTTLE_CORE_CLK] =
&gcc_video_mvp_throttle_core_clk.clkr,
[GCC_EDP_CLKREF_EN] = &gcc_edp_clkref_en.clkr,
};
static const struct qcom_reset_map gcc_yupik_resets[] = {