From f7b54dbeb805e35e83c7c9ffb39703c122b3eb93 Mon Sep 17 00:00:00 2001
From: Chandan Kumar Jha <cjha@qti.qualcomm.com>
Date: Mon, 31 Aug 2020 16:41:42 +0530
Subject: [PATCH] ARM: dts: msm: Add GCC throttle clock for Shima

Add GCC throttle clock for real time(RT) and non real
time(NRT) client for Shima target. We need to control
explicitly GCC throttle clock for shima.

CRs-Fixed: 2770220
Change-Id: If414039847ffd91fd0a2022e4a4c6fe213f2647f
---
 shima-camera.dtsi | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/shima-camera.dtsi b/shima-camera.dtsi
index af2eda6c8f4a..46890611963e 100644
--- a/shima-camera.dtsi
+++ b/shima-camera.dtsi
@@ -1322,10 +1322,17 @@
 		camnoc-axi-min-ib-bw = <3000000000>;
 		regulator-names = "camss-vdd";
 		camss-vdd-supply = <&cam_cc_titan_top_gdsc>;
+		/*
+		 * GCC throttle rt/nrt clock is added as a workaround in shima.
+		 * Normally, This clock should be turned on/off along with
+		 * GCC HF/SF clock
+		 */
 		clock-names =
 			"gcc_ahb_clk",
 			"gcc_axi_hf_clk",
 			"gcc_axi_sf_clk",
+			"gcc_rt_throttle_clk",
+			"gcc_nrt_throttle_clk",
 			"slow_ahb_clk_src",
 			"cpas_ahb_clk",
 			"cpas_core_ahb_clk",
@@ -1335,6 +1342,8 @@
 			<&gcc GCC_CAMERA_AHB_CLK>,
 			<&gcc GCC_CAMERA_HF_AXI_CLK>,
 			<&gcc GCC_CAMERA_SF_AXI_CLK>,
+			<&gcc GCC_TITAN_RT_THROTTLE_CORE_CLK>,
+			<&gcc GCC_TITAN_NRT_THROTTLE_CORE_CLK>,
 			<&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
 			<&camcc CAM_CC_CPAS_AHB_CLK>,
 			<&camcc CAM_CC_CORE_AHB_CLK>,
@@ -1342,12 +1351,12 @@
 			<&camcc CAM_CC_CAMNOC_AXI_CLK>;
 		src-clock-name = "camnoc_axi_clk_src";
 		clock-rates =
-			<0 0 0 0 0 0 0 0>,
-			<0 0 0 80000000 0 0 300000000 0>,
-			<0 0 0 80000000 0 0 300000000 0>,
-			<0 0 0 80000000 0 0 342855555 0>,
-			<0 0 0 80000000 0 0 400000000 0>,
-			<0 0 0 80000000 0 0 400000000 0>;
+			<0 0 0 0 0 0 0 0 0 0>,
+			<0 0 0 0 0 80000000 0 0 300000000 0>,
+			<0 0 0 0 0 80000000 0 0 300000000 0>,
+			<0 0 0 0 0 80000000 0 0 342855555 0>,
+			<0 0 0 0 0 80000000 0 0 400000000 0>,
+			<0 0 0 0 0 80000000 0 0 400000000 0>;
 		clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1",
 			"nominal", "turbo";
 		control-camnoc-axi-clk;