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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "Revert "disp: msm: sde: use mdp scratch register to pass drm mode info"" into display-kernel.lnx.5.4
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f80e5bce2b
3 changed files with 3 additions and 160 deletions
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@ -9,7 +9,6 @@
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#include "sde_dbg.h"
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#include "sde_kms.h"
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#define SCRATCH_REGISTER_0 0x14
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#define SSPP_SPARE 0x28
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#define UBWC_DEC_HW_VERSION 0x058
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#define UBWC_STATIC 0x144
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@ -615,51 +614,6 @@ static u32 sde_hw_get_autorefresh_status(struct sde_hw_mdp *mdp, u32 intf_idx)
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return autorefresh_status;
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}
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static void sde_hw_clear_mode_index(struct sde_hw_mdp *mdp)
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{
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struct sde_hw_blk_reg_map c;
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if (!mdp)
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return;
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c = mdp->hw;
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c.blk_off = 0x0;
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SDE_REG_WRITE(&c, SCRATCH_REGISTER_0, 0x0);
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}
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static void sde_hw_set_mode_index(struct sde_hw_mdp *mdp, u32 display_id,
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u32 mode)
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{
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struct sde_hw_blk_reg_map c;
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u32 value = 0;
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if (!mdp)
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return;
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c = mdp->hw;
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c.blk_off = 0x0;
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/* 4-bits for mode index of each display */
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value = SDE_REG_READ(&c, SCRATCH_REGISTER_0);
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value |= (mode << (display_id * 4));
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SDE_REG_WRITE(&c, SCRATCH_REGISTER_0, value);
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}
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static u32 sde_hw_get_mode_index(struct sde_hw_mdp *mdp, u32 display_id)
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{
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struct sde_hw_blk_reg_map c;
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u32 value = 0;
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c = mdp->hw;
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c.blk_off = 0x0;
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value = SDE_REG_READ(&c, SCRATCH_REGISTER_0);
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value = (value >> (display_id * 4)) & 0xF;
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return value;
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}
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static void _setup_mdp_ops(struct sde_hw_mdp_ops *ops,
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unsigned long cap)
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{
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@ -677,9 +631,6 @@ static void _setup_mdp_ops(struct sde_hw_mdp_ops *ops,
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ops->reset_ubwc = sde_hw_reset_ubwc;
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ops->intf_audio_select = sde_hw_intf_audio_select;
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ops->set_mdp_hw_events = sde_hw_mdp_events;
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ops->set_mode_index = sde_hw_set_mode_index;
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ops->get_mode_index = sde_hw_get_mode_index;
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ops->clear_mode_index = sde_hw_clear_mode_index;
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if (cap & BIT(SDE_MDP_VSYNC_SEL))
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ops->setup_vsync_source = sde_hw_setup_vsync_source;
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else
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@ -207,28 +207,6 @@ struct sde_hw_mdp_ops {
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*/
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void (*set_mdp_hw_events)(struct sde_hw_mdp *mdp, bool enable);
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/**
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* clear_mode_index - clears the mode index in spare reg
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* @mdp: mdp top context driver
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*/
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void (*clear_mode_index)(struct sde_hw_mdp *mdp);
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/**
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* set_mode_index - sets the current drm mode index to spare reg
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* @mdp: mdp top context driver
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* @display_id: display index
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* @mode: drm mode index
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*/
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void (*set_mode_index)(struct sde_hw_mdp *mdp, u32 display_id,
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u32 mode);
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/**
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* get_mode_index - gets the current drm mode index from spare reg
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* @mdp: mdp top context driver
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* @display_id: display index
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*/
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u32 (*get_mode_index)(struct sde_hw_mdp *mdp, u32 display_id);
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/**
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* set_cwb_ppb_cntl - select the data point for CWB
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* @mdp: mdp top context driver
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@ -1272,59 +1272,6 @@ static void _sde_kms_release_splash_resource(struct sde_kms *sde_kms,
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}
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}
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void _sde_kms_program_mode_info(struct sde_kms *sde_kms)
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{
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struct drm_encoder *encoder;
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struct drm_crtc *crtc;
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struct drm_connector *connector;
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struct drm_connector_list_iter conn_iter;
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struct dsi_display *dsi_display;
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struct drm_display_mode *drm_mode;
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int i;
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struct drm_device *dev;
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u32 mode_index = 0;
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if (!sde_kms->dev || !sde_kms->hw_mdp)
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return;
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dev = sde_kms->dev;
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sde_kms->hw_mdp->ops.clear_mode_index(sde_kms->hw_mdp);
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for (i = 0; i < sde_kms->dsi_display_count; i++) {
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dsi_display = (struct dsi_display *)sde_kms->dsi_displays[i];
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if (dsi_display->bridge->base.encoder) {
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encoder = dsi_display->bridge->base.encoder;
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crtc = encoder->crtc;
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if (!crtc->state->active)
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continue;
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mutex_lock(&dev->mode_config.mutex);
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drm_connector_list_iter_begin(dev, &conn_iter);
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drm_for_each_connector_iter(connector, &conn_iter) {
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if (connector->encoder_ids[0]
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== encoder->base.id)
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break;
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}
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drm_connector_list_iter_end(&conn_iter);
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mutex_unlock(&dev->mode_config.mutex);
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list_for_each_entry(drm_mode, &connector->modes, head) {
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if (drm_mode_equal(
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&crtc->state->mode, drm_mode))
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break;
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mode_index++;
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}
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sde_kms->hw_mdp->ops.set_mode_index(
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sde_kms->hw_mdp, i, mode_index);
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SDE_DEBUG("crtc:%d, display_idx:%d, mode_index:%d\n",
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DRMID(crtc), i, mode_index);
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}
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}
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}
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int sde_kms_vm_trusted_post_commit(struct sde_kms *sde_kms,
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struct drm_atomic_state *state)
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{
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@ -1458,9 +1405,6 @@ int sde_kms_vm_primary_post_commit(struct sde_kms *sde_kms,
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/* properly handoff color processing features */
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sde_cp_crtc_vm_primary_handoff(crtc);
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/* program the current drm mode info to scratch reg */
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_sde_kms_program_mode_info(sde_kms);
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/* handle non-SDE clients pre-release */
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if (vm_ops->vm_client_pre_release) {
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rc = vm_ops->vm_client_pre_release(sde_kms);
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@ -3007,32 +2951,6 @@ static int _sde_kms_update_planes_for_cont_splash(struct sde_kms *sde_kms,
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return 0;
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}
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static struct drm_display_mode *_sde_kms_get_splash_mode(
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struct sde_kms *sde_kms, struct drm_connector *connector,
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u32 display_idx)
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{
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struct drm_display_mode *drm_mode = NULL, *curr_mode = NULL;
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u32 i = 0, mode_index;
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if (sde_kms->splash_data.type == SDE_SPLASH_HANDOFF) {
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/* currently consider modes[0] as the preferred mode */
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curr_mode = list_first_entry(&connector->modes,
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struct drm_display_mode, head);
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} else if (sde_kms->hw_mdp && sde_kms->hw_mdp->ops.get_mode_index) {
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mode_index = sde_kms->hw_mdp->ops.get_mode_index(
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sde_kms->hw_mdp, display_idx);
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list_for_each_entry(drm_mode, &connector->modes, head) {
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if (mode_index == i) {
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curr_mode = drm_mode;
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break;
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}
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i++;
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}
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}
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return curr_mode;
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}
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static int sde_kms_inform_cont_splash_res_disable(struct msm_kms *kms,
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struct dsi_display *dsi_display)
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{
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@ -3242,13 +3160,9 @@ static int sde_kms_cont_splash_config(struct msm_kms *kms)
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crtc->state->encoder_mask = (1 << drm_encoder_index(encoder));
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drm_mode = _sde_kms_get_splash_mode(sde_kms, connector, i);
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if (!drm_mode) {
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SDE_ERROR("invalid drm-mode type:%d, index:%d\n",
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sde_kms->splash_data.type, i);
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return -EINVAL;
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}
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/* currently consider modes[0] as the preferred mode */
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drm_mode = list_first_entry(&connector->modes,
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struct drm_display_mode, head);
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SDE_DEBUG("drm_mode->name = %s, type=0x%x, flags=0x%x\n",
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drm_mode->name, drm_mode->type,
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drm_mode->flags);
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