iommu/arm-smmu: Add support to disable page-table coherency

There may be environments where page-table walker coherency
is enabled by default, so add support to allow clients to
disable it.

Change-Id: I1681c680e82cabb5b132867af03f2e599bfc72e3
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
This commit is contained in:
Isaac J. Manjarres 2020-04-07 09:56:46 -07:00
commit f85843d3df
2 changed files with 35 additions and 4 deletions

View file

@ -214,6 +214,9 @@ static bool is_iommu_pt_coherent(struct arm_smmu_domain *smmu_domain)
if (test_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,
smmu_domain->attributes))
return true;
else if (test_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,
smmu_domain->attributes))
return false;
else if (smmu_domain->smmu && smmu_domain->smmu->dev)
return dev_is_dma_coherent(smmu_domain->smmu->dev);
else
@ -2673,6 +2676,9 @@ static int arm_smmu_setup_default_domain(struct device *dev,
if (!strcmp(str, "coherent"))
__arm_smmu_domain_set_attr(domain,
DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT, &attr);
else if (!strcmp(str, "non-coherent"))
__arm_smmu_domain_set_attr(domain,
DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT, &attr);
else if (!strcmp(str, "LLC"))
__arm_smmu_domain_set_attr(domain,
DOMAIN_ATTR_USE_UPSTREAM_HINT, &attr);
@ -3449,6 +3455,12 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
smmu_domain->attributes);
ret = 0;
break;
case DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT:
*((int *)data) =
test_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,
smmu_domain->attributes);
ret = 0;
break;
case DOMAIN_ATTR_CB_STALL_DISABLE:
*((int *)data) = test_bit(DOMAIN_ATTR_CB_STALL_DISABLE,
smmu_domain->attributes);
@ -3689,6 +3701,24 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain,
}
break;
}
case DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT: {
int force_non_coherent = *((int *)data);
if (smmu_domain->smmu != NULL) {
dev_err(smmu_domain->smmu->dev,
"cannot change force non-coherent attribute while attached\n");
ret = -EBUSY;
} else if (force_non_coherent) {
set_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,
smmu_domain->attributes);
ret = 0;
} else {
clear_bit(DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT,
smmu_domain->attributes);
ret = 0;
}
break;
}
default:
ret = -ENODEV;
}

View file

@ -185,10 +185,11 @@ enum iommu_attr {
#define DOMAIN_ATTR_EARLY_MAP (EXTENDED_ATTR_BASE + 13)
#define DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT (EXTENDED_ATTR_BASE + 14)
#define DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT (EXTENDED_ATTR_BASE + 15)
#define DOMAIN_ATTR_CB_STALL_DISABLE (EXTENDED_ATTR_BASE + 16)
#define DOMAIN_ATTR_USE_LLC_NWA (EXTENDED_ATTR_BASE + 17)
#define DOMAIN_ATTR_NO_CFRE (EXTENDED_ATTR_BASE + 18)
#define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 19)
#define DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT (EXTENDED_ATTR_BASE + 16)
#define DOMAIN_ATTR_CB_STALL_DISABLE (EXTENDED_ATTR_BASE + 17)
#define DOMAIN_ATTR_USE_LLC_NWA (EXTENDED_ATTR_BASE + 18)
#define DOMAIN_ATTR_NO_CFRE (EXTENDED_ATTR_BASE + 19)
#define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 20)
/* These are the possible reserved region types */
enum iommu_resv_type {