diff --git a/drivers/gpu/msm/adreno_a5xx.c b/drivers/gpu/msm/adreno_a5xx.c index 91f541ac45b0..2b9f43daeb96 100644 --- a/drivers/gpu/msm/adreno_a5xx.c +++ b/drivers/gpu/msm/adreno_a5xx.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -87,8 +88,21 @@ static void a530_efuse_leakage(struct adreno_device *adreno_dev) adreno_efuse_unmap(); } -static void a5xx_platform_setup(struct adreno_device *adreno_dev) +static int a5xx_probe(struct platform_device *pdev, + u32 chipid, const struct adreno_gpu_core *gpucore) { + struct adreno_device *adreno_dev; + + adreno_dev = (struct adreno_device *) + of_device_get_match_data(&pdev->dev); + + memset(adreno_dev, 0, sizeof(*adreno_dev)); + + adreno_dev->gpucore = gpucore; + adreno_dev->chipid = chipid; + + adreno_reg_offset_init(gpucore->gpudev->reg_offsets); + adreno_dev->sptp_pc_enabled = ADRENO_FEATURE(adreno_dev, ADRENO_SPTP_PC); @@ -107,6 +121,8 @@ static void a5xx_platform_setup(struct adreno_device *adreno_dev) if (adreno_is_a530(adreno_dev)) a530_efuse_leakage(adreno_dev); + + return adreno_device_probe(pdev, adreno_dev); } static void _do_fixup(const struct adreno_critical_fixup *fixups, int count, @@ -2970,10 +2986,9 @@ struct adreno_gpudev adreno_a5xx_gpudev = { #ifdef CONFIG_QCOM_KGSL_CORESIGHT .coresight = {&a5xx_coresight}, #endif - .probe = adreno_target_probe, + .probe = a5xx_probe, .start = a5xx_start, .snapshot = a5xx_snapshot, - .platform_setup = a5xx_platform_setup, .init = a5xx_init, .irq_handler = a5xx_irq_handler, .rb_start = a5xx_rb_start,