From 3c07507344b59e6193719df47b04f614acf85799 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Tue, 25 Feb 2020 15:54:32 -0700 Subject: [PATCH 1/2] ARM: dts: msm: Move IOMMU clocks to the GPU device Move the definition of the IOMMU clocks to the GPU device so that they are identified with an actual platform device instead of a pseudo device. Change-Id: Ic0dedbadaa12e748db585cf164ed5e4ea45c43c0 --- qcom/lahaina-gpu.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/qcom/lahaina-gpu.dtsi b/qcom/lahaina-gpu.dtsi index 37ac13f9f2c4..e6b65e0ff283 100644 --- a/qcom/lahaina-gpu.dtsi +++ b/qcom/lahaina-gpu.dtsi @@ -19,6 +19,13 @@ interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "kgsl_3d0_irq"; + clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&clock_gpucc GPU_CC_AHB_CLK>; + clock-names = "gcc_gpu_memnoc_gfx", + "gcc_gpu_snoc_dvm_gfx", + "gpu_cc_ahb"; + qcom,chipid = <0x06060000>; qcom,initial-pwrlevel = <2>; @@ -141,13 +148,6 @@ compatible = "qcom,kgsl-smmu-v2"; reg = <0x03da0000 0x20000>; - clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, - <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, - <&clock_gpucc GPU_CC_AHB_CLK>; - clock-names = "gcc_gpu_memnoc_gfx", - "gcc_gpu_snoc_dvm_gfx", - "gpu_cc_ahb"; - gfx3d_user: gfx3d_user { compatible = "qcom,smmu-kgsl-cb"; iommus = <&kgsl_smmu 0x0 0x400>; From 041963c9bf7d9bc8276cc99f5daecc24b384801e Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Thu, 27 Feb 2020 10:52:58 -0700 Subject: [PATCH 2/2] ARM: dts: msm: Add the CX GDSC to the IOMMU device Add the CX GDSC to the IOMMU node so that we can make sure that it is enabled before trying to access IOMMU registers. Change-Id: Ic0dedbad2410d2131dec75d54159f0fba0e3aa6d --- qcom/lahaina-gpu.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/lahaina-gpu.dtsi b/qcom/lahaina-gpu.dtsi index e6b65e0ff283..ef336c9439d9 100644 --- a/qcom/lahaina-gpu.dtsi +++ b/qcom/lahaina-gpu.dtsi @@ -148,6 +148,8 @@ compatible = "qcom,kgsl-smmu-v2"; reg = <0x03da0000 0x20000>; + vddcx-supply = <&gpu_cc_cx_gdsc>; + gfx3d_user: gfx3d_user { compatible = "qcom,smmu-kgsl-cb"; iommus = <&kgsl_smmu 0x0 0x400>;