From f91022c2e69c32fee5c36c27bc45d4f2214cbe2f Mon Sep 17 00:00:00 2001 From: Gaurav Kohli Date: Fri, 9 Oct 2020 12:22:21 +0530 Subject: [PATCH] drivers: edac: Add Lahaina CPU gold core part id for kryo edac Add Lahaina CPU gold core part id macro for kryo edac. This is needed while parsing the L1/L2/L3 cache errors. Change-Id: I48230c3b5f498fc6d02625d22a410ed94c90543c Signed-off-by: Gaurav Kohli --- drivers/edac/kryo_arm64_edac.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/edac/kryo_arm64_edac.c b/drivers/edac/kryo_arm64_edac.c index 5d26e7821e60..e20a05cc704d 100644 --- a/drivers/edac/kryo_arm64_edac.c +++ b/drivers/edac/kryo_arm64_edac.c @@ -36,6 +36,7 @@ #define QCOM_CPU_PART_KRYO4XX_SILVER_V2 0x805 #define QCOM_CPU_PART_KRYO6XX_SILVER_V1 0xD05 +#define QCOM_CPU_PART_KRYO6XX_GOLD 0xD41 #define QCOM_CPU_PART_KRYO6XX_GOLDPLUS 0xD44 #define L1_GOLD_IC_BIT 0x1 @@ -262,6 +263,7 @@ static void dump_err_reg(int errorcode, int level, u64 errxstatus, u64 errxmisc, break; case QCOM_CPU_PART_KRYO4XX_GOLD: case QCOM_CPU_PART_KRYO5XX_GOLD: + case QCOM_CPU_PART_KRYO6XX_GOLD: case QCOM_CPU_PART_KRYO6XX_GOLDPLUS: way = (int) KRYO_ERRXMISC_WAY(errxmisc); break; @@ -303,6 +305,7 @@ static void kryo_parse_l1_l2_cache_error(u64 errxstatus, u64 errxmisc, break; case QCOM_CPU_PART_KRYO4XX_GOLD: case QCOM_CPU_PART_KRYO5XX_GOLD: + case QCOM_CPU_PART_KRYO6XX_GOLD: case QCOM_CPU_PART_KRYO6XX_GOLDPLUS: switch (KRYO_ERRXMISC_LVL_GOLD(errxmisc)) { case L1_GOLD_DC_BIT: