From f919cbe3df1bfbc63b8a671d1e510a86f44d7fb6 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Wed, 15 Jul 2020 09:31:29 -0600 Subject: [PATCH] msm: kgsl: Use per-target scratch memory for preemption a5xx and a6xx both have a need for a bit of scratch memory for preemption. Rename the existing "counters" member in struct adreno_preemption from a5xx and use it for a6xx to store the context restore address. Change-Id: Ic0dedbad6493e99b35d8c771673e8f9f686f927c Signed-off-by: Jordan Crouse --- drivers/gpu/msm/adreno.h | 6 ++---- drivers/gpu/msm/adreno_a5xx_preempt.c | 8 ++++---- drivers/gpu/msm/adreno_a6xx_preempt.c | 22 +++++++++++++--------- drivers/gpu/msm/adreno_ioctl.c | 2 +- drivers/gpu/msm/kgsl.h | 8 -------- 5 files changed, 20 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h index c5ad9d41038d..2afa04df690f 100644 --- a/drivers/gpu/msm/adreno.h +++ b/drivers/gpu/msm/adreno.h @@ -249,8 +249,7 @@ enum adreno_preempt_states { /** * struct adreno_preemption * @state: The current state of preemption - * @counters: Memory descriptor for the memory where the GPU writes the - * preemption counters on switch + * @scratch: Per-target scratch memory for implementation specific functionality * @timer: A timer to make sure preemption doesn't stall * @work: A work struct for the preemption worker (for 5XX) * preempt_level: The level of preemption (for 6XX) @@ -260,7 +259,7 @@ enum adreno_preempt_states { */ struct adreno_preemption { atomic_t state; - struct kgsl_memdesc *counters; + struct kgsl_memdesc *scratch; struct timer_list timer; struct work_struct work; unsigned int preempt_level; @@ -269,7 +268,6 @@ struct adreno_preemption { unsigned int count; }; - struct adreno_busy_data { unsigned int gpu_busy; unsigned int bif_ram_cycles; diff --git a/drivers/gpu/msm/adreno_a5xx_preempt.c b/drivers/gpu/msm/adreno_a5xx_preempt.c index 6155933da4d6..b48c2d2b9c4b 100644 --- a/drivers/gpu/msm/adreno_a5xx_preempt.c +++ b/drivers/gpu/msm/adreno_a5xx_preempt.c @@ -530,17 +530,17 @@ int a5xx_preemption_init(struct adreno_device *adreno_dev) INIT_WORK(&preempt->work, _a5xx_preemption_worker); /* Allocate mem for storing preemption counters */ - if (IS_ERR_OR_NULL(preempt->counters)) - preempt->counters = kgsl_allocate_global(device, + if (IS_ERR_OR_NULL(preempt->scratch)) + preempt->scratch = kgsl_allocate_global(device, adreno_dev->num_ringbuffers * A5XX_CP_CTXRECORD_PREEMPTION_COUNTER_SIZE, 0, 0, "preemption_counters"); - ret = PTR_ERR_OR_ZERO(preempt->counters); + ret = PTR_ERR_OR_ZERO(preempt->scratch); if (ret) return ret; - addr = preempt->counters->gpuaddr; + addr = preempt->scratch->gpuaddr; /* Allocate mem for storing preemption switch record */ FOR_EACH_RINGBUFFER(adreno_dev, rb, i) { diff --git a/drivers/gpu/msm/adreno_a6xx_preempt.c b/drivers/gpu/msm/adreno_a6xx_preempt.c index 7a52c786174e..d8be38d767ec 100644 --- a/drivers/gpu/msm/adreno_a6xx_preempt.c +++ b/drivers/gpu/msm/adreno_a6xx_preempt.c @@ -295,8 +295,8 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) kgsl_sharedmem_writel(iommu->smmu_info, PREEMPT_SMMU_RECORD(context_idr), contextidr); - kgsl_sharedmem_readq(device->scratch, &gpuaddr, - SCRATCH_PREEMPTION_CTXT_RESTORE_ADDR_OFFSET(next->id)); + kgsl_sharedmem_readq(preempt->scratch, &gpuaddr, + next->id * sizeof(u64)); /* * Set a keepalive bit before the first preemption register write. @@ -530,12 +530,10 @@ unsigned int a6xx_preemption_pre_ibsubmit( rb->perfcounter_save_restore_desc->gpuaddr); if (context) { - struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_context *drawctxt = ADRENO_CONTEXT(context); struct adreno_ringbuffer *rb = drawctxt->rb; - uint64_t dest = - SCRATCH_PREEMPTION_CTXT_RESTORE_GPU_ADDR(device, - rb->id); + uint64_t dest = adreno_dev->preempt.scratch->gpuaddr + + (rb->id * sizeof(u64)); *cmds++ = cp_mem_packet(adreno_dev, CP_MEM_WRITE, 2, 2); cmds += cp_gpuaddr(adreno_dev, cmds, dest); @@ -553,9 +551,8 @@ unsigned int a6xx_preemption_post_ibsubmit(struct adreno_device *adreno_dev, struct adreno_ringbuffer *rb = adreno_dev->cur_rb; if (rb) { - struct kgsl_device *device = KGSL_DEVICE(adreno_dev); - uint64_t dest = SCRATCH_PREEMPTION_CTXT_RESTORE_GPU_ADDR(device, - rb->id); + uint64_t dest = adreno_dev->preempt.scratch->gpuaddr + + (rb->id * sizeof(u64)); *cmds++ = cp_mem_packet(adreno_dev, CP_MEM_WRITE, 2, 2); cmds += cp_gpuaddr(adreno_dev, cmds, dest); @@ -689,6 +686,13 @@ int a6xx_preemption_init(struct adreno_device *adreno_dev) return ret; } + if (IS_ERR_OR_NULL(preempt->scratch)) { + preempt->scratch = kgsl_allocate_global(device, PAGE_SIZE, + 0, 0, "preempt_scratch"); + if (IS_ERR(preempt->scratch)) + return PTR_ERR(preempt->scratch); + } + /* Allocate mem for storing preemption smmu record */ if (IS_ERR_OR_NULL(iommu->smmu_info)) iommu->smmu_info = kgsl_allocate_global(device, PAGE_SIZE, diff --git a/drivers/gpu/msm/adreno_ioctl.c b/drivers/gpu/msm/adreno_ioctl.c index 4e2b5254d46c..4894d4ede4dc 100644 --- a/drivers/gpu/msm/adreno_ioctl.c +++ b/drivers/gpu/msm/adreno_ioctl.c @@ -160,7 +160,7 @@ static long adreno_ioctl_preemption_counters_query( ARRAY_SIZE(adreno_dev->ringbuffers)); if (copy_to_user(u64_to_user_ptr(read->counters), - adreno_dev->preempt.counters->hostptr, + adreno_dev->preempt.scratch->hostptr, levels_to_copy * size_level)) return -EFAULT; diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h index 8ffbf0b07b8b..1be47571ddb0 100644 --- a/drivers/gpu/msm/kgsl.h +++ b/drivers/gpu/msm/kgsl.h @@ -65,7 +65,6 @@ * Used Data: * Offset: Length(bytes): What * 0x0: 4 * KGSL_PRIORITY_MAX_RB_LEVELS: RB0 RPTR - * 0x10: 8 * KGSL_PRIORITY_MAX_RB_LEVELS: RB0 CTXT RESTORE ADDR */ /* Shadow global helpers */ @@ -73,13 +72,6 @@ #define SCRATCH_RPTR_GPU_ADDR(dev, id) \ ((dev)->scratch->gpuaddr + SCRATCH_RPTR_OFFSET(id)) -#define SCRATCH_PREEMPTION_CTXT_RESTORE_ADDR_OFFSET(id) \ - (SCRATCH_RPTR_OFFSET(KGSL_PRIORITY_MAX_RB_LEVELS) + \ - ((id) * sizeof(uint64_t))) -#define SCRATCH_PREEMPTION_CTXT_RESTORE_GPU_ADDR(dev, id) \ - ((dev)->scratch->gpuaddr + \ - SCRATCH_PREEMPTION_CTXT_RESTORE_ADDR_OFFSET(id)) - /* Timestamp window used to detect rollovers (half of integer range) */ #define KGSL_TIMESTAMP_WINDOW 0x80000000