A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "Revert "dt-bindings: Add documentation for USB CSR clk""

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qctecmdr 2020-08-31 03:20:21 -07:00 • committed by Gerrit - the friendly Code Review server
commit f93ed0f9ca
2 changed files with 4 additions and 9 deletions
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3
bindings/usb/qcom,dwc3.txt
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@ -23,9 +23,6 @@ Optional clocks:
Not present on "qcom,msm8996-dwc3" compatible.
"cfg_noc" System Config NOC clock.
Not present on "qcom,msm8996-dwc3" compatible.
"core_csr" Allows to set/clear FORCE_MEM_CORE_ON with USB core
clock to retain USB controller CSR across system deep
sleep.
- assigned-clocks: Should be:
MOCK_UTMI_CLK
MASTER_CLK

10
qcom/lahaina-usb.dtsi
View file

@ -29,10 +29,9 @@
<&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
<&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>,
<&clock_gcc GCC_USB30_PRIM_MASTER_CLK__FORCE_MEM_CORE_ON>;
<&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"utmi_clk", "sleep_clk", "core_csr_clk";
"utmi_clk", "sleep_clk";
resets = <&clock_gcc GCC_USB30_PRIM_BCR>;
reset-names = "core_reset";
@ -365,10 +364,9 @@
<&clock_gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
<&clock_gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&clock_gcc GCC_USB30_SEC_SLEEP_CLK>,
<&clock_gcc GCC_USB3_SEC_CLKREF_EN>,
<&clock_gcc GCC_USB30_SEC_MASTER_CLK__FORCE_MEM_CORE_ON>;
<&clock_gcc GCC_USB3_SEC_CLKREF_EN>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"utmi_clk", "sleep_clk", "xo", "core_csr_clk";
"utmi_clk", "sleep_clk", "xo";
resets = <&clock_gcc GCC_USB30_SEC_BCR>;
reset-names = "core_reset";