mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
ARM: SoC: late updates for v5.4
This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window. Signed-off-by: Arnd Bergmann <[email protected]> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6P3AAoJEJpsee/mABjZMFUP/i/J9CNJjEec0cWCG1XgP/qh SpKFf2g9Y9QzqAzDDovo7atTGHTCG8C0fn8W+bkv9h7dWj2uxRtFISM9COomUoHa 0qXUL9bbDB3LAvstLV451p4c67XsJUazV9KZPD7VsCquucWbDDYaGPz+0reSRm6y imK2jXqD0leG0CNbgRXfh64J32TF3M0/XnwbsNJreCmQvwUvkYLL5VNi/qcnvfyp k0g1/5OzH9mLertoVKWqJ9o1919Yvxdl6/eyDmTPmX08bs03WnPbCEzRVO/zkOKZ O6RcAlsjiLblQdfbDJKfbaYDDaE53d2NwdCvBIdSPmDoYM5eYjQC4PmDM0+0dmHe bFd9giBjzU2Uab7ylgeoVl6pX1ISk6bwmZxNup45cy0xyw8wuky02Wq2bQTuZbgI UcBlOGWR4aH/OCpNafn+ovDBYGc64I7EQobG7UiilrVq/libx1Uo7yjlWSxe4j8n wFchiB8It24WUiS4JhJFrTklkaf5JW3K3czdDATW7aZKjv+fnHU5GMre/hvNP4z7 qROlP69/eqNXG25VOcwWPQE8yhP43+ZgyvoVwDh1H6VZdy9WxgYyEoiBAhFfcrng +RVAT4rzylPmKP8oygVF1fpTHTS8xHrYBbjkdRaj5KqmTDdqI/nMsYoq+E0R1ScV EsnyNVq7wnvH12zrOv+I =Qtkp -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC late updates from Arnd Bergmann: "This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: - The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. - After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. - The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. - The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. - The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window" [ This pull request itself wasn't actually sent late at all by Arnd, but I waited on the branches that it used to be pulled first, so it ends up being merged much later than the other ARM SoC pull requests this merge window - Linus ] * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits) ARM: dts: dir685: Drop spi-cpol from the display ARM: dts: aspeed: Add AST2600 pinmux nodes ARM: dts: aspeed: Add AST2600 and EVB ARM: exynos: Enable support for ARM architected timers ARM: samsung: Fix system restart on S3C6410 ARM: dts: mmp2: add OLPC XO 1.75 machine ARM: dts: mmp2: rename the USB PHY node ARM: dts: mmp2: specify reg-shift for the UARTs ARM: dts: mmp2: add camera interfaces ARM: dts: mmp2: fix the SPI nodes ARM: dts: mmp2: trivial whitespace fix arm64: dts: marvell: add DTS for Turris Mox dt-bindings: marvell: document Turris Mox compatible arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address arm64: dts: ti: k3-j721e-main: Add hwspinlock node arm64: dts: ti: k3-am65-main: Add hwspinlock node arm64: dts: k3-j721e: Add gpio-keys on common processor board dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E ...
This commit is contained in:
commit
f97c81dc6c
47 changed files with 3186 additions and 883 deletions
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@ -1,14 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* ti-sysc.c - Texas Instruments sysc interconnect target driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/io.h>
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@ -62,18 +54,26 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = {
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* @module_size: size of the interconnect target module
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* @module_va: virtual address of the interconnect target module
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* @offsets: register offsets from module base
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* @mdata: ti-sysc to hwmod translation data for a module
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* @clocks: clocks used by the interconnect target module
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* @clock_roles: clock role names for the found clocks
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* @nr_clocks: number of clocks used by the interconnect target module
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* @rsts: resets used by the interconnect target module
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* @legacy_mode: configured for legacy mode if set
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* @cap: interconnect target module capabilities
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* @cfg: interconnect target module configuration
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* @cookie: data used by legacy platform callbacks
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* @name: name if available
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* @revision: interconnect target module revision
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* @enabled: sysc runtime enabled status
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* @needs_resume: runtime resume needed on resume from suspend
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* @child_needs_resume: runtime resume needed for child on resume from suspend
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* @disable_on_idle: status flag used for disabling modules with resets
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* @idle_work: work structure used to perform delayed idle on a module
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* @clk_enable_quirk: module specific clock enable quirk
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* @clk_disable_quirk: module specific clock disable quirk
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* @reset_done_quirk: module specific reset done quirk
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* @module_enable_quirk: module specific enable quirk
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*/
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struct sysc {
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struct device *dev;
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@ -95,11 +95,11 @@ struct sysc {
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unsigned int enabled:1;
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unsigned int needs_resume:1;
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unsigned int child_needs_resume:1;
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unsigned int disable_on_idle:1;
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struct delayed_work idle_work;
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void (*clk_enable_quirk)(struct sysc *sysc);
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void (*clk_disable_quirk)(struct sysc *sysc);
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void (*reset_done_quirk)(struct sysc *sysc);
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void (*module_enable_quirk)(struct sysc *sysc);
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};
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static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
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@ -503,7 +503,7 @@ static void sysc_clkdm_allow_idle(struct sysc *ddata)
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static int sysc_init_resets(struct sysc *ddata)
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{
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ddata->rsts =
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devm_reset_control_get_optional(ddata->dev, "rstctrl");
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devm_reset_control_get_optional_shared(ddata->dev, "rstctrl");
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if (IS_ERR(ddata->rsts))
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return PTR_ERR(ddata->rsts);
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@ -615,8 +615,8 @@ static void sysc_check_quirk_stdout(struct sysc *ddata,
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* node but children have "ti,hwmods". These belong to the interconnect
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* target node and are managed by this driver.
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*/
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static int sysc_check_one_child(struct sysc *ddata,
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struct device_node *np)
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static void sysc_check_one_child(struct sysc *ddata,
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struct device_node *np)
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{
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const char *name;
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@ -626,22 +626,14 @@ static int sysc_check_one_child(struct sysc *ddata,
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sysc_check_quirk_stdout(ddata, np);
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sysc_parse_dts_quirks(ddata, np, true);
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return 0;
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}
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static int sysc_check_children(struct sysc *ddata)
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static void sysc_check_children(struct sysc *ddata)
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{
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struct device_node *child;
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int error;
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for_each_child_of_node(ddata->dev->of_node, child) {
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error = sysc_check_one_child(ddata, child);
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if (error)
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return error;
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}
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return 0;
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for_each_child_of_node(ddata->dev->of_node, child)
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sysc_check_one_child(ddata, child);
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}
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/*
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@ -794,9 +786,7 @@ static int sysc_map_and_check_registers(struct sysc *ddata)
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if (error)
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return error;
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error = sysc_check_children(ddata);
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if (error)
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return error;
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sysc_check_children(ddata);
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error = sysc_parse_registers(ddata);
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if (error)
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@ -940,6 +930,9 @@ set_autoidle:
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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}
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if (ddata->module_enable_quirk)
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ddata->module_enable_quirk(ddata);
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return 0;
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}
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@ -1031,8 +1024,7 @@ static int __maybe_unused sysc_runtime_suspend_legacy(struct device *dev,
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dev_err(dev, "%s: could not idle: %i\n",
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__func__, error);
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if (ddata->disable_on_idle)
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reset_control_assert(ddata->rsts);
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reset_control_assert(ddata->rsts);
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return 0;
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}
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@ -1043,8 +1035,7 @@ static int __maybe_unused sysc_runtime_resume_legacy(struct device *dev,
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struct ti_sysc_platform_data *pdata;
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int error;
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if (ddata->disable_on_idle)
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reset_control_deassert(ddata->rsts);
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reset_control_deassert(ddata->rsts);
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pdata = dev_get_platdata(ddata->dev);
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if (!pdata)
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@ -1091,10 +1082,9 @@ static int __maybe_unused sysc_runtime_suspend(struct device *dev)
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ddata->enabled = false;
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err_allow_idle:
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sysc_clkdm_allow_idle(ddata);
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reset_control_assert(ddata->rsts);
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if (ddata->disable_on_idle)
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reset_control_assert(ddata->rsts);
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sysc_clkdm_allow_idle(ddata);
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return error;
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}
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@ -1109,11 +1099,11 @@ static int __maybe_unused sysc_runtime_resume(struct device *dev)
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if (ddata->enabled)
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return 0;
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if (ddata->disable_on_idle)
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reset_control_deassert(ddata->rsts);
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sysc_clkdm_deny_idle(ddata);
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reset_control_deassert(ddata->rsts);
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if (sysc_opt_clks_needed(ddata)) {
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error = sysc_enable_opt_clocks(ddata);
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if (error)
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@ -1256,6 +1246,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_MODULE_QUIRK_I2C),
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SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_QUIRK("gpu", 0x50000000, 0x14, -1, -1, 0x00010201, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff,
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SYSC_MODULE_QUIRK_SGX),
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SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
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SYSC_MODULE_QUIRK_WDT),
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@ -1271,8 +1264,11 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0x4edb1902, 0xffffffff, 0),
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SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0),
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SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
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SYSC_QUIRK("d2d", 0x4a0b6000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
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SYSC_QUIRK("d2d", 0x4a0cd000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
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SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
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SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, 0),
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SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
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SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
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SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0),
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@ -1424,6 +1420,15 @@ static void sysc_clk_disable_quirk_i2c(struct sysc *ddata)
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sysc_clk_quirk_i2c(ddata, false);
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}
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/* 36xx SGX needs a quirk for to bypass OCP IPG interrupt logic */
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static void sysc_module_enable_quirk_sgx(struct sysc *ddata)
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{
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int offset = 0xff08; /* OCP_DEBUG_CONFIG */
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u32 val = BIT(31); /* THALIA_INT_BYPASS */
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sysc_write(ddata, offset, val);
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}
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/* Watchdog timer needs a disable sequence after reset */
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static void sysc_reset_done_quirk_wdt(struct sysc *ddata)
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{
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@ -1466,6 +1471,9 @@ static void sysc_init_module_quirks(struct sysc *ddata)
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return;
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}
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if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
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ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
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if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT)
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ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
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}
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@ -1532,7 +1540,7 @@ static int sysc_legacy_init(struct sysc *ddata)
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*/
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static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset)
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{
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int error, val;
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int error;
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if (!ddata->rsts)
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return 0;
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@ -1543,14 +1551,9 @@ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset)
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return error;
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}
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error = reset_control_deassert(ddata->rsts);
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if (error == -EEXIST)
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return 0;
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reset_control_deassert(ddata->rsts);
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error = readx_poll_timeout(reset_control_status, ddata->rsts, val,
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val == 0, 100, MAX_MODULE_SOFTRESET_WAIT);
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return error;
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return 0;
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}
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/*
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@ -1559,12 +1562,11 @@ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset)
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*/
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static int sysc_reset(struct sysc *ddata)
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{
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int sysc_offset, syss_offset, sysc_val, rstval, quirks, error = 0;
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int sysc_offset, syss_offset, sysc_val, rstval, error = 0;
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u32 sysc_mask, syss_done;
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sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
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syss_offset = ddata->offsets[SYSC_SYSSTATUS];
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quirks = ddata->cfg.quirks;
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if (ddata->legacy_mode || sysc_offset < 0 ||
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ddata->cap->regbits->srst_shift < 0 ||
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@ -2427,6 +2429,10 @@ static int sysc_probe(struct platform_device *pdev)
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goto unprepare;
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}
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/* Balance reset counts */
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if (ddata->rsts)
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reset_control_assert(ddata->rsts);
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sysc_show_registers(ddata);
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ddata->dev->type = &sysc_device_type;
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@ -2446,9 +2452,6 @@ static int sysc_probe(struct platform_device *pdev)
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pm_runtime_put(&pdev->dev);
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}
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if (!of_get_available_child_count(ddata->dev->of_node))
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ddata->disable_on_idle = true;
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return 0;
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err:
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