diff --git a/bindings/interconnect/qcom,epss-l3.txt b/bindings/interconnect/qcom,epss-l3.txt
index 8bd41c0a753e..1ce85c18cdea 100644
--- a/bindings/interconnect/qcom,epss-l3.txt
+++ b/bindings/interconnect/qcom,epss-l3.txt
@@ -8,6 +8,7 @@ Required properties :
 - compatible : shall contain only one of the following:
 			"qcom,lahaina-epss-l3-shared",
 			"qcom,lahaina-epss-l3-cpu",
+			"qcom,holi-epss-l3-cpu",
 			"qcom,shima-epss-l3-cpu",
 			"qcom,shima-epss-l3-shared";
 - reg : Address and length of the register set for the device
diff --git a/qcom/holi.dtsi b/qcom/holi.dtsi
index 065a09493d7b..32fd2c9bc143 100644
--- a/qcom/holi.dtsi
+++ b/qcom/holi.dtsi
@@ -2,6 +2,7 @@
 #include <dt-bindings/clock/qcom,gcc-holi.h>
 #include <dt-bindings/clock/qcom,gpucc-holi.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/interconnect/qcom,epss-l3.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/qcom,ipcc.h>
 #include <dt-bindings/gpio/gpio.h>
@@ -895,6 +896,15 @@
 		#interconnect-cells = <1>;
 	};
 
+	epss_l3_cpu: l3_cpu@fd91000 {
+		reg = <0x0fd91000 0x4000>;
+		compatible = "qcom,holi-epss-l3-cpu";
+		#interconnect-cells = <1>;
+		clock-names = "xo", "alternate";
+		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
+		status = "disabled";
+	};
+
 	clocks {
 		xo_board: xo-board {
 			compatible = "fixed-clock";