From fa03bf1032d56600c0d3c2190b54831a513e7657 Mon Sep 17 00:00:00 2001 From: Xiaofeng Wang Date: Tue, 15 Jun 2021 15:21:12 +0800 Subject: [PATCH] corfu5g: modify macro AVDD and wide macro flash 1.modify macro camera AVDD for DVT1 2.add wide and macro camera flash Change-Id: I8dbc7ca3f1e0cb500bd1bc89e57bbd9be2d31bfb Signed-off-by: Xiaofeng Wang Reviewed-on: https://gerrit.mot.com/1979843 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Yiwen Liu Reviewed-by: Qiang Guo Reviewed-by: Wang Liu Reviewed-by: Shuo Wang Reviewed-by: Xingyun Fu Reviewed-by: Zhuoran Xu Reviewed-by: Zhichao Chen Reviewed-by: Huosheng Liao Submit-Approved: Jira Key --- qcom/Makefile | 5 +- qcom/holi-corfup-dvt1-overlay.dts | 137 ++++++++++++++++++++++++++++++ 2 files changed, 141 insertions(+), 1 deletion(-) create mode 100644 qcom/holi-corfup-dvt1-overlay.dts diff --git a/qcom/Makefile b/qcom/Makefile index 54a47a07ccc1..daf1ff59bf5f 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -36,11 +36,14 @@ holi-ibiza-pvt-overlay.dtbo-base := holi-moto-base.dtb dtbo-$(CONFIG_CORFUP_DTB) += \ holi-corfup-evb-overlay.dtbo \ holi-corfup-evt1-overlay.dtbo \ - holi-corfup-evt2-overlay.dtbo + holi-corfup-evt2-overlay.dtbo \ + holi-corfup-dvt1-overlay.dtbo + holi-corfup-evb-overlay.dtbo-base := holi-moto-base.dtb holi-corfup-evt1-overlay.dtbo-base := holi-moto-base.dtb holi-corfup-evt2-overlay.dtbo-base := holi-moto-base.dtb +holi-corfup-dvt1-overlay.dtbo-base := holi-moto-base.dtb dtbo-$(CONFIG_CYPFG_DTB) += \ holi-cypfg-evb-overlay.dtbo \ diff --git a/qcom/holi-corfup-dvt1-overlay.dts b/qcom/holi-corfup-dvt1-overlay.dts new file mode 100644 index 000000000000..01f2f233922a --- /dev/null +++ b/qcom/holi-corfup-dvt1-overlay.dts @@ -0,0 +1,137 @@ +/* Copyright (c) 2021, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include "holi-corfup-common-overlay.dtsi" +#include "camera/holi-camera-sensor-mot-corfup-dvt1-overlay.dtsi" + +/ { + model = "corfup"; + compatible = "qcom,holi-corfup", "qcom,holi-moto", "qcom,holi"; + qcom,msm-id = <454 0x10000>, <472 0x10000>; + qcom,board-id = <0x45 0xB100>; +}; +&qupv3_se8_i2c { + sx937x@2c { + status = "disabled"; + }; +}; + +&qupv3_se10_i2c { + sx937x@2c { + compatible = "Semtech,sx937x"; + reg = <0x2c>; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&sar_int_default>; + pinctrl-1 = <&sar_int_sleep>; + interrupt-parent = <&tlmm>; + interrupts = <24 0x02>; + interrupt-names = "sx937x_irq"; + Semtech,nirq-gpio = <&tlmm 24 0x02>; + cap_vdd-supply = <&pm6150a_l8>; + /*use PH4/5/6 as the reference sensor + set it to 0xff if the ref-phases-x is not used*/ + Semtech,ref-phases-a = <4>; + Semtech,ref-phases-b = <5>; + Semtech,ref-phases-c = <6>; + Semtech,button-flag = <0x0f>; + Semtech,reg-num = <61>; + Semtech,reg-init = < + 0x8024 0x7F00 /*PHEN, Disable all Phases*/ + 0x4004 0x74 /*irq mask*/ + 0x8020 0x10 /*Set scan period*/ + + /*set Phase sampling frequency to 65KHz*/ + 0x8028 0x876 /*AFE_PARAM_PH0*/ + 0x8034 0x876 /*AFE_PARAM_PH1*/ + 0x8040 0x876 /*AFE_PARAM_PH2*/ + 0x804C 0x876 /*AFE_PARAM_PH3*/ + 0x8058 0x876 /*AFE_PARAM_PH4*/ + 0x8064 0x876 /*AFE_PARAM_PH5*/ + 0x8070 0x876 /*AFE_PARAM_PH6*/ + /*0x807C 0x876 */ /*AFE_PARAM_PH7*/ + + /*set CS3 to hiz, because it used as IRQ pin*/ + 0x8030 0xFFD9FF /*REG_AFEPH_PH0, CS4, ANT1, Bottom*/ + 0x803C 0xBFF9FF /*REG_AFEPH_PH1, CS7, ANT2, Top Right*/ + 0x8048 0xFFF9FD /*REG_AFEPH_PH2, CS0, ANT3, Top Left*/ + 0x8054 0xFEF9FF /*REG_AFEPH_PH3, CS5, ANT4, Top Right side*/ + 0x8060 0xF7F9FF /*REG_AFEPH_PH4, CS6, ANT1_REF, Bottom*/ + 0x806C 0xFFF97F /*REG_AFEPH_PH5, CS2, ANT2_REF, Top Right*/ + 0x8078 0xFFF9EF /*REG_AFEPH_PH6, CS1, ANT3_REF, Top Left*/ + 0x8084 0xBFF9FF /*REG_AFEPH_PH7, NOT USE*/ + + /*Set Phase Proximity Threshold*/ + 0x8098 0x00009240 /*prox threshold ph0*/ + 0x80B8 0x00008035 /*prox threshold ph1*/ + 0x80D8 0x00004343 /*prox threshold ph2*/ + 0x80F8 0x00003C3C /*prox threshold ph3*/ + 0x8118 0x00000000 /*prox threshold ph4*/ + 0x8138 0x00000000 /*prox threshold ph5*/ + 0x8158 0x00000000 /*prox threshold ph6*/ + /*0x8178 0x00000000*/ /*prox threshold ph7*/ + + /*Set Useful Filter*/ + 0x808C 0x20600019 /*PH0 Filter Setup B, non-detect threshold of USE filter*/ + 0x80AC 0x20600019 /*PH1 Filter Setup B, non-detect threshold of USE filter*/ + 0x80CC 0x20600019 /*PH2 Filter Setup B, non-detect threshold of USE filter*/ + 0x80EC 0x20600019 /*PH3 Filter Setup B, non-detect threshold of USE filter*/ + 0x810C 0x20600019 /*PH4 Filter Setup B, non-detect threshold of USE filter*/ + 0x812C 0x20600019 /*PH5 Filter Setup B, non-detect threshold of USE filter*/ + 0x814C 0x20600019 /*PH6 Filter Setup B, non-detect threshold of USE filter*/ + 0x816C 0x20600019 /*PH7 Filter Setup B, non-detect threshold of USE filter*/ + + 0x8090 0x50D47000 + 0x80B0 0x46D87000 + 0x80D0 0x46D07000 + 0x80F0 0x3CDE7000 + 0x8110 0x50D27000 + 0x8130 0x50D27000 + 0x8150 0x50D27000 + 0x8170 0x50D27000 + + /*PH0123 raw filter 1/4*/ + 0x8088 0x300000 + 0x80A8 0x300000 + 0x80C8 0x300000 + 0x80E8 0x300000 + + /*PH456 raw filter 1/64*/ + 0x8108 0x600000 + 0x8128 0x600000 + 0x8148 0x600000 + + /*Set Reference Phase*/ + 0x8188 0x8000014 /*Reference Correction Setup B ENG1*/ + 0x818C 0x0 /*Reference Correction Setup B ENG2*/ + 0x8190 0x0 /*Reference Correction Setup B ENG3*/ + 0x8194 0x0 /*Reference Correction Setup B ENG4*/ + + /*Set Reference Correction*/ + 0x80A0 0x222200E1 /*Reference Correction Setup A PH0*/ + 0x80C0 0x0 /*Reference Correction Setup A PH1*/ + 0x80E0 0x0 /*Reference Correction Setup A PH2*/ + 0x8100 0x0 /*Reference Correction Setup A PH3*/ + 0x8120 0x0 /*Reference Correction Setup A PH4*/ + 0x8140 0x0 /*Reference Correction Setup A PH5*/ + 0x8160 0x0 /*Reference Correction Setup A PH6*/ + 0x8180 0x0 /*Reference Correction Setup A PH7*/ + + 0x8024 0x7F7F /*PHEN, Enable PH0~PH6*/ + >; + + status = "ok"; + }; +}; +