From fa8952baab1e2bf0afa8e79246291931a2bf66bd Mon Sep 17 00:00:00 2001 From: Abhijit Kulkarni Date: Tue, 3 Dec 2019 12:38:57 -0800 Subject: [PATCH] ARM: dts: msm: add dsc 1.2 offsets on lahaina target This change adds register offsets and capabilities of different dsc hw sub-blocks in dpu for lahaina target. Change-Id: Ib0e0a5754544ad6236a56edf41c2a6ef4c10678a --- display/lahaina-sde.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/display/lahaina-sde.dtsi b/display/lahaina-sde.dtsi index 9ba15be5d614..ca8691bf457e 100644 --- a/display/lahaina-sde.dtsi +++ b/display/lahaina-sde.dtsi @@ -91,9 +91,13 @@ qcom,sde-cdm-off = <0x7a200>; qcom,sde-cdm-size = <0x224>; - qcom,sde-dsc-off = <0x81000 0x81400 0x81800 0x81c00>; + qcom,sde-dsc-off = <0x81000 0x81000 0x82000 0x82000>; qcom,sde-dsc-size = <0x140>; qcom,sde-dsc-pair-mask = <2 1 4 3>; + qcom,sde-dsc-hw-rev = "dsc_1_2"; + qcom,sde-dsc-enc = <0x100 0x200 0x100 0x200>; + qcom,sde-dsc-ctl = <0xF00 0xF80 0xF00 0xF80>; + qcom,sde-dsc-native422-supp = <0 0 1 1>; qcom,sde-dither-off = <0xe0 0xe0 0xe0 0xe0 0xe0 0xe0>;